-------- Gilles Clement writes: > Could you point me to a practical design example of a Pi divider ?
Look at Fig 2 in Enrico's paper: > http://rubiola.org/pdf-articles/conference/2013-ifcs-Frequency-dividers.pdf I would implement it so that the shiftregister is also the divider, by making it twice the length and feed it back to itself. In your case it would be a 18 stage shiftregister, where the first 9 stages initialize to zero, and the last 9 stages initialize to one, with the output connected back to the input that will give you a rotating pattern of 000000000111111111000000000111111111... Only 9 of the stages should be driving resistors to the output. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 [email protected] | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
