On 6/30/20 5:04 PM, Richard (Rick) Karlquist wrote:
On 6/30/2020 3:47 PM, dschuecker wrote:
Hi,
a divide by five should possible with a synchronous state-machine made
of 3 ( sufficiently fast-) JK-FlipFlops.
All 3 FFs are clocked with the input freq. , the outputs of the FFs
are fed back to the the JK-inputs, the divided freq. is output of one
of the FFs.
Detlef
Nice ideas, but JK flip flops seem to have become extinct in
newer logic families.
It might be interesting to see what could be done
using one of those programmable logic devices (PLD).
Oddly, those too are hard to find.. The venerable 22V10 (which I used in
the 1980s) is still available (as the ATF22V10 from Microchip/semi),
targeting the military market (probably to "build to print" stuff
designed in the 80s and 90s)
But it's interesting - lots of 20k gate FPGAs and such, not so many
"dozen flip flops and 2 dozen gates" devices.
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