Hi,

yes, it is self-clearing. It cycles 0 4 6 7 1 (leftmost FF MSB), 2 clears 
to 7, 3->1, 5->2. On one output you get 3/5 duty cycle, on the other two 
you get 2/5. 

Detlef Schücker




Von:    "Robert LaJeunesse" <lajeune...@mail.com>
An:     time-nuts@lists.febo.com
Datum:  01.07.2020 09:30
Betreff:        Re: [time-nuts] low power divide by 5
Gesendet von:   "time-nuts" <time-nuts-boun...@lists.febo.com>



Take a look at the "modified" shift-register like counter in the attached 
jpg file. When simulated online it behaved as expected for a divide by 5. 
I believe it also is self-clearing from illegal states, but the other 
simulator I tested that in wasn't good for documenting the design.

Bob L.

> Sent: Tuesday, June 30, 2020 at 6:47 PM
> From: "dschuecker" <detlef.schuec...@dschuecker.de>
> To: time-nuts@lists.febo.com
> Subject: Re: [time-nuts] low power divide by 5
>
> Hi,
> 
> a divide by five should possible with a synchronous state-machine made 
> of 3 ( sufficiently fast-) JK-FlipFlops.
> 
> All 3 FFs are clocked with the input freq. , the outputs of the FFs are 
> fed back to the the JK-inputs,  the divided freq. is output of one of 
> the FFs.
> 
> Additional constraints: no external ANDs or ORs or NOTs, the 
> state-machine does not get stuck in the 3 unused states.
> 
> This turned out to be a very interesting problem and I do not yet come 
> up with a solution. Maybe there is none. Analytical solutions all 
> failed, I will try a brute force enumeration attack tomorrow.
> 
> lots of fun !
> 
> Cheers
> 
> Detlef
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