On 5/7/2018 3:44 PM, Yakov wrote:
I read OP's question differently, it seemed he wanted to know more
about the intrinsics of TinyCC in regards to various instruction
set supports rather than to know more about ARM technology in
general? OR maybe "how advanced is the support of ARM in TCC"? If
it was worded as "how do you add a new instruction set to TCC in
three easy steps" I'd also want to read the answer btw :)
Well, that's one interpretation. And there may be language
impediments. But look back at the last two threads OP initiated.
On the balance it looks more like he has product or tool ideas...
but wants a tcc ready for incorporation into the product or tool.
Notice he did not continue the thread requesting for
implementation guidance, or coding guidance.
On another note, here's another arch update for OP: MIPS just
announced nanoMIPS the other day. :-)
2018-04-26 18:20 GMT+03:00 KHMan :
On 4/26/2018 10:31 PM, Ulrich Althöfer wrote:
Dear Developers,
I am interested to hear more about the state of
implementing the ARM instruction set.
- Are there different levels of developing states between
the 16 bit (Thumb) and 32 bit instruction set?
- Is there a hardware abstraction level (HAL) built in the
Tiny C Compiler?
- Are there documents about this subject?
See this intro: https://en.wikipedia.org/wiki/ARM_Cortex-M
<https://en.wikipedia.org/wiki/ARM_Cortex-M>
It's like the IA32/x64 instruction set these days, there are a
lot of different sets of instructions and this and that. What
do you want to target? That is the question. All? Then the
problem is complexity and scope.
If you want to target IoT parts, say they use Cortex-M4F, then
you need to support a bunch of stuff. Supporting a newer arch
will require supporting other stuff. You kinda need a arch
infrastructure to keep track of all these things. SAM parts
all say Cortex-M0+ in their datasheets (that I've read
anyway), but M0+ is only for the traditional small MCUs.
Anyway, for a C user like me who rarely dip into assembly,
it's hard to keep track of all this proficiently. Successful
chip architectures with lots of legacy baggage need a bit of
effort to learn.
- How expensive is it to implement the Thumb code?
Projects such as tcc are resource-starved. I'm a lurker, I
code other stuff, but I'm sure coders are welcome here. There
are no troops to rally. It's more roll up your sleeves and dig in.
- Isn't it a challenge to implement the 'tiny' Thumb
instruction set, because ARM is the overwhelming dominant
embedded processor architecture nowadays?
Not all embedded users need Thumb instructions. The ARM arch
has different 'modes' targeted towards different market segments.
If you want to be on the leading edge of something, why not do
RISC-V instead?
I am glad to hear about the intentions of implementing.
Greetings from Germany
Ulrich
[snip]
--
Cheers,
Kein-Hong Man (esq.)
Selangor, Malaysia
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