On Sep 20, 2007, at 2:00 PM, KURT PETERS wrote:
I found a bug in the I2C interface for the Mica platform(ATM128L)
in TinyOS 2.x (2.0.2). In particular, after line 322 in file
Atm128I2CMasterPacketP.nc the code should be changed as follows:
/* Note #define ATM128_I2C_SLA_WRITE 0x00
* #define ATM128_I2C_SLA_READ 0x01
*/
if (state == I2C_ADDR) {
if (reading == TRUE) {
call I2C.write(((packetAddr<<1) & 0xff) | ATM128_I2C_SLA_READ);
}
else
call I2C.write(((packetAddr<<1) & 0xff) & (~ATM128_I2C_SLA_READ));
// Note that this is redundant since the shift should
shift in a "0"
Reasons:
1. According to the Atmel 128L user guide pg 213, the address
should be sent as SLA+R or SLA+W where SLA is a 7-bit slave
address. The way Atm128I2CMasterPacketP is currently written, the
result of an address write actually appears shifted "right", e.g.,
0x48 become 0x24 on the I2C bus.
There's some discussion on devel about this right now. The question
is whether the I2C interface expects the address to be right or left
justified. Some data sheets describe the address as left justified,
while some describe it as right justified, hence the confusion.
2. Additionally, if someone happens to have the least significant
bit set, a simple OR with ATM128_I2C_SLA_WRITE will make it appear
as if the master is attempting a read.
Another approach would be to & 0xfe. But the atm128 implementation
expects a left-justified address.
The code snippet above fixes both of those errors. I can attach
the fully-modified code should anyone need it. It should be noted
that the MSP430 doesn't have the same problem since it has separate
"own" and "slave" address registers.
Yes -- this discrepancy in address handling is the question at hand.
The question is which approach is more intuitive, left- or right-
justification. The two implementations should have the same algorithm.
Phil
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