Jung Il:

First, half of the packet is loaded using SpiPacket interface as usual, and
> I issue STXON command. And then the rest of the packet is loaded using
> TXFIFO_RAM interface to specify the offset in the TXFIFO. But during this
> TXFIFO_RAM.write() operation, a TX underflow occurs. CC2420 is sending some
> signal that is invisible to the sniffer.
>
Use TXFIFO.write() instead of TXFIFO_RAM.write(). The number of bytes
written to TXFIFO using TXFIFO.write() must be length+1 (the length byte and
then the payload of length lenght). TXFIFO_RAM.write() is only used to
modify whatever is in the TXFIFO.

In theory, this must work since SPI is faster than RF.
>
On the micaz, it is possible to issue STXON first, and then upload the whole
(!) packet. I haven't tried that on the telos yet. The SPI speed on the
telos is 500kbps, which should be enough. I checked in a FastSpiByte
implementation for the msp430 recently, I suggest that you try that.

Janos
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