> -----Original Message----- > From: Alan Cox [mailto:gno...@lxorguk.ukuu.org.uk] > Sent: Thursday, June 8, 2017 11:23 AM > To: Shaikh, Azhar <azhar.sha...@intel.com> > Cc: jarkko.sakki...@linux.intel.com; jguntho...@obsidianresearch.com; > tpmdd-devel@lists.sourceforge.net; linux-ker...@vger.kernel.org; linux- > security-mod...@vger.kernel.org > Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems > > > > > + outb(0x80, 0xCC); > > > > + > > > > + /* Make sure the above write is completed */ > > > > + wmb(); > > > > > > Why the wmb(). It doesn't do what the comment says! Also this code > > > is x86 specific > > > > > > > > > > Memory barrier to enforce the order so that the outb() is completed, > which ensures that the LPC clocks are running before sending any TPM > command. > > wmb() doesn't do that. It merely ensures that the write has been posted to > the fabric. If as I suspect your LPC bus implements outb() as a non-posted > write you don't need the wmb(). If it doesn't then you need to issue > whatever access is needed to the fabric to ensure the post completed (eg for > PCI if you do an MMIO write you must do an MMIO read from the same > devfn). > > Secondly outb(0x80, 0xCC) doesn't write 0xCC to port 0x80. It writes 0x80 to > port 0xCC ! >
Oops my bad! I got that reversed. Will change it. > Alan ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ tpmdd-devel mailing list tpmdd-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/tpmdd-devel
