Following up on this thread based on this week's TCG call ...
1 - burstCount can safely be ignored on writes. This is explicit in
most places in the TCG spec. In places where it is not explicit, it was
simply an editorial omission. We are going through the spec and adding
"without incurring wait states."
TCG is willing to publish an errata if that makes developers more
comfortable.
2 - These are multi-mhz buses. The TPM vendors conformed that wait
states, even if incurred, will be sub-usec. I.e., less that a microsecond.
Essentially, the DD is loading the FIFO, and the TPM is unloading the
FIFO at processor speeds.
Thus, even if one were worried about an odd system new enough to have a
TPM, but old enough to have an LPC attached printer, keyboard, mouse or
floppy, the delay in printing or typing will be insignificant.
3 - I asked several platform vendors with long TCG experience, and they
said that they know of no motherboards that share the LPC bus with a TPM
plus another device.
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