I'd be curious to the answer to this question.
I've always been told by our PCB Guru's that IPC spec for spacing
between traces on FR4 board with a wet mask (of a type I can't
remember) is 0.0001" per volt. (so 1500V is needs 0.15" spacing).
Most PCB houses talk "IPC" lingo - maybe that's what they are
specifying. (We have several PCB Guru's here who all have IPC charts
on there walls).
My experiences are you can cut the IPC spacing in half and (provided
the FR4 is extremely clean and the mask has low ionic contamination)
you still have good performance. (As in low corona - high DWV).
My applications are not telecom however - they are hipot cable
testers.
What do the PCB "smart guys" have to say :)
Jon Bertrand
[email protected]
______________________________ Reply Separator _________________________________
Subject: Printed Circuit Board Layout
Author: [email protected] at Address-InternetPO
List-Post: [email protected]
Date: 9/27/96 10:25 AM
Hello Treggers,
Our PCB house has given me a conundrum for T1 Ring/Tip/Ground clearances.
They declare FCC 68 and UL-1950 3rd edition conflict with clearance
recommendations.
I'm not sure to what they refer - test voltages versus recommended
clearances(?).
I have always recommended min. of 0.02" between R-T and min. of 0.03"
between R-G and T-G as I think may have been posted here before.
Before I walk into a rat's nest,
does someone know what they are talking about specific with each standard?
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Doug McKean
[email protected]
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The comments and opinions stated herein are mine alone,
and do not reflect those of my employer.
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