That’s pretty amazing. It’s pretty functional overall with a few quirks (see below). I always wanted to do something like this. This is one of the cleaner designs like this I’ve seen. I like that’s it pure logic vs being table based/micro coded. One of the fun things about designing a CPU is that you get to design the perfect instruction set. This instruction set is 4 bits wide- 16 instructions, this keeps it simple for direct logic implementation A few things to note- It’s a Harvard type architecture- data and address busses are 8 bits. No subroutines, no indirect addressing of rom or ram There are no logical operations- and/or/xor etc.- some of these I guess you could fake with add and subtract which are present. There is no inc or dec instructions There are also no shift instructions, I’m a bit twiddling microcontroller guy, I need shifts. There is a Halt and a NOP instruction. A halt is kind of a nice instruction for a proto computer but NOP can almost always be faked- i.e. MOV A,A One of the coolest baby architectures that I’ve seen is the RPi Pico PIO. They made different compromises but it is so functional for how tiny it is. This might be the deepest rabbit hole that you can bury yourself in, looks like fun. Thanks for sharing! Regards, John M. Wettroth E: [email protected] M: (919) 349-9875 H: (984) 329-5420 From: TriEmbed <[email protected]> On Behalf Of Pete Soper via TriEmbed Sent: Sunday, June 21, 2026 1:45 PM To: Triangle Embedded Interest Group <[email protected]> Subject: [TriEmbed] A more interesting 8 bit processor This is both a simulation and a hardware design using easy to understand logic chips: https://github.com/c0rRupT9/STEPLA-1
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