I guess once they got locked into the 4 op-code space, they got locked in. It is economical. In most of these discrete designs, you can plop down a 74xx181 ALU that will do everything that you’d want for an ALU. It sounds like this guy is one level up from transistors- a purist. I took a very rudimentary architecture course- one level up form the sophomore logic course. We had an imaginary processor called the IMP, IIRC (or some Alliteration of Illinois and uP). It was like a big flat 16 bit thing that we coded in ML. There was a simulator that ran on the Plato system, a networked learning system. I think they ported some Tiny C type language to it. All I can really remember is very tedious and long homework sets. In my career at Maxim, I defined the requirement for a fast 8051 derivative with nice analog on board- real 12 bit data converters. Two designers knocked it out in few months. Two years later, we acquired Dallas semiconductor which made all our efforts kind of moot, they had processes that could make a similar part for ¼ of our costs.. Though you can still buy the MAX7651, I don’t know why. We did have some design wins in some industrial mini PLC stuff in Asia- Omron, they were the “sponsor” customer if I remember correct- not that they paid any engineering cost but they agreed to design with it if we made it. Big Fun. Regards, John M. Wettroth E: [email protected] M: (919) 349-9875 H: (984) 329-5420 From: Scott Hall <[email protected]> Sent: Monday, June 22, 2026 12:20 PM To: Triangle Embedded Computing Interest Group <[email protected]> Cc: Pete Soper <[email protected]>; John Wettroth <[email protected]> Subject: Re: [TriEmbed] A more interesting 8 bit processor This reminds me so much of a homework problem in our microprocessors class (ca. 1982) - using discrete logic (no microcode lookup tables). We did have bit shifts, adders (including increment/decrement), AND/OR/NOT/XOR/XAND logic, branch and loop instructions - 63 instructions in all. It was a simplified version of the Intel Prompt-80s (8080 based) in our lab, and we were to use what we built for the rest of the semester and not the Intel or Motorola boxes. Note that addressing was linear (not segmented) and registers were little-endian like Motorola, not big-endian like Intel. -- Scott G. Hall Raleigh, NC, USA [email protected] <mailto:[email protected]> ”Failure is the opportunity to begin again more intelligently.” -- Henry Ford On Mon, Jun 22, 2026, 11:27 AM John Wettroth via TriEmbed <[email protected] <mailto:[email protected]> > wrote: That’s pretty amazing. It’s pretty functional overall with a few quirks (see below). I always wanted to do something like this. This is one of the cleaner designs like this I’ve seen. I like that’s it pure logic vs being table based/micro coded. One of the fun things about designing a CPU is that you get to design the perfect instruction set. This instruction set is 4 bits wide- 16 instructions, this keeps it simple for direct logic implementation A few things to note- It’s a Harvard type architecture- data and address busses are 8 bits. No subroutines, no indirect addressing of rom or ram There are no logical operations- and/or/xor etc.- some of these I guess you could fake with add and subtract which are present. There is no inc or dec instructions There are also no shift instructions, I’m a bit twiddling microcontroller guy, I need shifts. There is a Halt and a NOP instruction. A halt is kind of a nice instruction for a proto computer but NOP can almost always be faked- i.e. MOV A,A One of the coolest baby architectures that I’ve seen is the RPi Pico PIO. They made different compromises but it is so functional for how tiny it is. This might be the deepest rabbit hole that you can bury yourself in, looks like fun. Thanks for sharing! Regards, John M. Wettroth E: <mailto:[email protected]> [email protected] M: (919) 349-9875 H: (984) 329-5420 From: TriEmbed < <mailto:[email protected]> [email protected]> On Behalf Of Pete Soper via TriEmbed Sent: Sunday, June 21, 2026 1:45 PM To: Triangle Embedded Interest Group < <mailto:[email protected]> [email protected]> Subject: [TriEmbed] A more interesting 8 bit processor This is both a simulation and a hardware design using easy to understand logic chips: https://github.com/c0rRupT9/STEPLA-1 _______________________________________________ Triangle, NC Embedded Interest Group mailing list
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