[PATCH v3 12/12] timer: p8700: Add support for reading time from memory-mapped mtime

[Uros Stajic]

The P8700 core does not support reading the time CSR directly and
raises an illegal instruction exception. This patch adds support for
reading the timer value via its memory-mapped address at 0x16108050
when running on a P8700 processor.

Signed-off-by: Uros Stajic <uros.sta...@htecgroup.com>
---
 drivers/timer/riscv_timer.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
index 1f4980ceb38..5138236a028 100644
--- a/drivers/timer/riscv_timer.c
+++ b/drivers/timer/riscv_timer.c
@@ -18,8 +18,15 @@
 #include <timer.h>
 #include <asm/csr.h>
 
+#define P8700_TIMER_ADDR 0x16108050
+
 static u64 notrace riscv_timer_get_count(struct udevice *dev)
 {
+       if (IS_ENABLED(CONFIG_P8700_RISCV)) {
+               u32 *mtime_addr = (u32 *)P8700_TIMER_ADDR;
+               return *mtime_addr;
+       }
+
        __maybe_unused u32 hi, lo;
 
        if (IS_ENABLED(CONFIG_64BIT))
-- 
2.34.1