This series switches the TH1520 platform along with the only board, th1520_lpi4a, to use upstream devicetree.
The upstream dt specifies pinctrl configuration for the UART, which is probed before proper U-Boot relocation. This means we must make pincontroller, and resource used by the pincontroller available in relocation. too, so here come PATCH 2 and 3. Making more drivers bind and probe before relocation raises requirement of pre-relocation malloc pool, PATCH 1 increases SYS_MALLOC_F_LEN to 0x10000 to fit drivers' usage. Tested on Lichee Pi 4A 16GiB variant, and it introduces no functionality regression. Thanks for your time and review. Yao Zi (4): configs: th1520_lpi4a: Enlarge SYS_MALLOC_F_LEN to 0x10000 clk: thead: th1520-ap: Mark drivers as DM_FLAG_PRE_RELOC pinctrl: th1520: Mark driver as DM_FLAG_PRE_RELOC dts: th1520: Switch to upstream devicetree arch/riscv/cpu/th1520/Kconfig | 1 + arch/riscv/dts/Makefile | 1 - .../dts/th1520-lichee-module-4a-u-boot.dtsi | 10 + arch/riscv/dts/th1520-lichee-module-4a.dtsi | 164 ------ .../riscv/dts/th1520-lichee-pi-4a-u-boot.dtsi | 27 + arch/riscv/dts/th1520-lichee-pi-4a.dts | 33 -- arch/riscv/dts/th1520-u-boot.dtsi | 44 ++ arch/riscv/dts/th1520.dtsi | 530 ------------------ configs/th1520_lpi4a_defconfig | 4 +- drivers/clk/thead/clk-th1520-ap.c | 3 + drivers/pinctrl/pinctrl-th1520.c | 1 + 11 files changed, 88 insertions(+), 730 deletions(-) create mode 100644 arch/riscv/dts/th1520-lichee-module-4a-u-boot.dtsi delete mode 100644 arch/riscv/dts/th1520-lichee-module-4a.dtsi create mode 100644 arch/riscv/dts/th1520-lichee-pi-4a-u-boot.dtsi delete mode 100644 arch/riscv/dts/th1520-lichee-pi-4a.dts create mode 100644 arch/riscv/dts/th1520-u-boot.dtsi delete mode 100644 arch/riscv/dts/th1520.dtsi -- 2.50.1
