On Friday 28 March 2008, Daniel Hellstrom wrote: > SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address. > SPARC CPUs implement flash_read64 which calls __raw_readq. > > For current SPARC architectures (LEON2 and LEON3) each read from the > FLASH must lead to a cache miss. This is because FLASH can not be set > non-cacheable since program code resides there, and alternatively disabling > cache is poor from performance view, or doing a cache flush between each > read is even poorer. > > Forcing a cache miss on a SPARC is done by a special instruction "lda" - > load alternative space, the alternative space number (ASI) is processor > implementation spcific and can be found by including <asm/processor.h>.
Added to cfi-flash repository. Thanks. Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] ===================================================================== ------------------------------------------------------------------------- Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://ad.doubleclick.net/clk;164216239;13503038;w?http://sf.net/marketplace _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
