This patch add basic support to the ixp465 cpu.

Signed-off-by: Michael Trimarchi <[EMAIL PROTECTED]>

---
 cpu/ixp/cpu.c        |    2 +-
 cpu/ixp/interrupts.c |    2 +-
 cpu/ixp/npe/npe.c    |    2 +-
 cpu/ixp/pci.c        |    2 +-
 cpu/ixp/serial.c     |    2 +-
 cpu/ixp/start.S      |   57 +++++++++++++++++++++++++++++++++++++++++++++----
 cpu/ixp/timer.c      |    2 +-
 drivers/pci/pci.c    |    8 +++---
 8 files changed, 62 insertions(+), 15 deletions(-)

diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c
index 2c7d5a0..289ed72 100644
--- a/cpu/ixp/cpu.c
+++ b/cpu/ixp/cpu.c
@@ -32,7 +32,7 @@
 
 #include <common.h>
 #include <command.h>
-#include <asm/arch/ixp425.h>
+#include <asm/arch/hardware.h>
 
 ulong loops_per_jiffy;
 
diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c
index 84fe937..ec3b0b5 100644
--- a/cpu/ixp/interrupts.c
+++ b/cpu/ixp/interrupts.c
@@ -30,7 +30,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/ixp425.h>
+#include <asm/arch/hardware.h>
 
 #ifdef CONFIG_USE_IRQ
 #include <asm/proc-armv/ptrace.h>
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index a33b956..86eb409 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -31,7 +31,7 @@
 #include <miiphy.h>
 #include <malloc.h>
 #include <asm/processor.h>
-#include <asm/arch-ixp/ixp425.h>
+#include <asm/arch/hardware.h>
 
 #include <IxOsal.h>
 #include <IxEthAcc.h>
diff --git a/cpu/ixp/pci.c b/cpu/ixp/pci.c
index 84c4339..8fc8571 100644
--- a/cpu/ixp/pci.c
+++ b/cpu/ixp/pci.c
@@ -30,7 +30,7 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <pci.h>
-#include <asm/arch/ixp425.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/ixp425pci.h>
 
 static void non_prefetch_read (unsigned int addr, unsigned int cmd,
diff --git a/cpu/ixp/serial.c b/cpu/ixp/serial.c
index 4549631..89ec6f0 100644
--- a/cpu/ixp/serial.c
+++ b/cpu/ixp/serial.c
@@ -29,7 +29,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/ixp425.h>
+#include <asm/arch/hardware.h>
 
 /*
  *               14.7456 MHz
diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S
index 757cfaa..af718b0 100644
--- a/cpu/ixp/start.S
+++ b/cpu/ixp/start.S
@@ -29,7 +29,8 @@
 
 #include <config.h>
 #include <version.h>
-#include <asm/arch/ixp425.h>
+
+#include <asm/arch/hardware.h>
 
 #define MMU_Control_M  0x001    /* Enable MMU */
 #define MMU_Control_A  0x002    /* Enable address alignment faults */
@@ -158,6 +159,16 @@ reset:
 	ldr     r2, =IXP425_EXP_CS0
 	str     r1, [r2]
 
+/*
+ * before relocating, we have to setup RAM timing
+ * because memory timing is board-dependend, you will
+ * find a lowlevel_init.S in your board directory.
+*/
+#ifdef CONFIG_IXP465
+	mov   ip, lr
+	bl lowlevel_init
+#endif
+
 	/* make sure flash is visible at 0 */
 #if 0
 	ldr 	r2, =IXP425_EXP_CFG0
@@ -165,6 +176,7 @@ reset:
 	orr     r1, r1, #0x80000000
 	str     r1, [r2]
 #endif
+#ifdef CONFIG_IXP425
 	mov 	r1, #CFG_SDR_CONFIG
 	ldr     r2, =IXP425_SDR_CONFIG
 	str     r1, [r2]
@@ -220,7 +232,7 @@ reset:
 	str     r3, [r1], #4
 	cmp     r0, r2
 	bne     30b
-
+#endif
 	/* invalidate I & D caches & BTB */
 	mcr	p15, 0, r0, c7, c7, 0
 	CPWAIT	r0
@@ -233,19 +245,43 @@ reset:
 	mcr	p15, 0, r0, c7, c10, 4
 	CPWAIT	r0
 
+#ifdef CONFIG_IXP465
+	ldr	r0, =2f
+	add	r0, r0, #PHYS_FLASH_1
+	ldr	r3, _TEXT_BASE
+	sub	r0, r0, r3
+#endif
+
 	/* move flash to 0x50000000 */
 	ldr 	r2, =IXP425_EXP_CFG0
 	ldr     r1, [r2]
 	bic     r1, r1, #0x80000000
+
+#ifdef CONFIG_IXP465
+	mov	r4, pc
+	cmp	r4, r3
+	bge	2f
+	ldr	r4, =0
+	b 1f
+	.p2align 5
+1:
 	str     r1, [r2]
 
 	nop
 	nop
 	nop
 	nop
+	mov pc, r0
 	nop
+2:
+#else
 	nop
-
+	nop
+	nop
+	nop
+	nop
+	nop
+#endif
 	/* invalidate I & Data TLB */
 	mcr 	p15, 0, r0, c8, c7, 0
 	CPWAIT r0
@@ -261,12 +297,23 @@ reset:
 	orr	r0,r0,#0x13
 	msr	cpsr,r0
 
+#ifdef CONFIG_IXP465
+	ldr	r1, =0
+	cmp     r4, r1			/* don't reloc during debug         */
+	bne     stack_setup
+#endif
+
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:				/* relocate U-Boot to RAM	    */
+#ifdef CONFIG_IXP465
+	ldr 	r0, =PHYS_FLASH_1	/* r0 <- position of code   */
+	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
+#else
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
-	cmp     r0, r1                  /* don't reloc during debug         */
-	beq     stack_setup
+	cmp	r0, r1			/* don't reloc during debug         */
+	bne     stack_setup
+#endif
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c
index 920f34e..53ed9b3 100644
--- a/cpu/ixp/timer.c
+++ b/cpu/ixp/timer.c
@@ -30,7 +30,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/ixp425.h>
+#include <asm/arch/hardware.h>
 
 #ifndef CONFIG_USE_IRQ
 ulong get_timer (ulong base)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7944b66..811069e 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -52,7 +52,7 @@ PCI_HOSE_OP(write, byte, u8)
 PCI_HOSE_OP(write, word, u16)
 PCI_HOSE_OP(write, dword, u32)
 
-#ifndef CONFIG_IXP425
+#if !defined(CONFIG_IXP425) && !defined(CONFIG_IXP465)
 #define PCI_OP(rw, size, type, error_code)				\
 int pci_##rw##_config_##size(pci_dev_t dev, int offset, type value)	\
 {									\
@@ -73,7 +73,7 @@ PCI_OP(read, dword, u32 *, *value = 0xffffffff)
 PCI_OP(write, byte, u8, )
 PCI_OP(write, word, u16, )
 PCI_OP(write, dword, u32, )
-#endif	/* CONFIG_IXP425 */
+#endif	/* CONFIG_IXP425 and CONFIG_IXP465*/
 
 #define PCI_READ_VIA_DWORD_OP(size, type, off_mask)			\
 int pci_hose_read_config_##size##_via_dword(struct pci_controller *hose,\
@@ -148,7 +148,7 @@ struct pci_controller *pci_bus_to_hose (int bus)
 	return NULL;
 }
 
-#ifndef CONFIG_IXP425
+#if !defined(CONFIG_IXP425) && !defined(CONFIG_IXP465)
 pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
 {
 	struct pci_controller * hose;
@@ -204,7 +204,7 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
 
 	return (-1);
 }
-#endif	/* CONFIG_IXP425 */
+#endif	/* CONFIG_IXP425 and CONFIG_IXP465*/
 
 pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
 {
-- 
1.5.2.5


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