Logic unit: boart/atmel/at572d940hfeb (except atmel_mci.c)
Purpose: AT572D940HF-EB core files
Author: Antnoio R. Costa <antonio.costa <at> atmel.com>
Date : 11 Jun 2008
Status:
- USB,MACB,MCI,DBGU,USARTS working
- Introduced interrput handling on reset to work around
a bug on SDRAM controller
- Introduced a function to compute system frequency at run-time
- Flashes initialised but not recognised
- Environment is built-in and temporarly stored in SDRAM
Signed-off-by: Antonio R. Costa <[EMAIL PROTECTED]>
diff --git a/board/atmel/at572d940hfeb/Makefile
b/board/atmel/at572d940hfeb/Makefile
new file mode 100644
index 0000000..c91bea6
--- /dev/null
+++ b/board/atmel/at572d940hfeb/Makefile
@@ -0,0 +1,55 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y += at572d940hfeb.o
+COBJS-y += partition.o
+COBJS-y += flash.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_CMD_MMC) += atmel_mci.o
+COBJS-$(CONFIG_USE_IRQ) += interrupts.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/atmel/at572d940hfeb/at572d940hfeb.c
b/board/atmel/at572d940hfeb/at572d940hfeb.c
new file mode 100644
index 0000000..68a9e24
--- /dev/null
+++ b/board/atmel/at572d940hfeb/at572d940hfeb.c
@@ -0,0 +1,267 @@
+/* (C) 2008 Copyright Atmel Corporation
+ *
+ * Antonio R. Costa <antonio.costa <at> atmel.com>
+ * <costa.antonior <at> gmail.com>
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at572d940hf.h>
+#include <asm/arch/at572d940hf_matrix.h>
+#include <asm/arch/at572d940hf_mc.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <asm/arch/at91_aic.h>
+#include <asm/arch/interrupts.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void AT572D940HFEB_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+ at91_set_A_periph(AT91_PIN_PA8, 1); /* TXD0 */
+ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+#endif
+
+#ifdef CONFIG_USART1
+ at91_set_A_periph(AT91_PIN_PC10, 1); /* TXD1 */
+ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD1 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+#endif
+
+#ifdef CONFIG_USART2
+ at91_set_A_periph(AT91_PIN_PC15, 1); /* TXD2 */
+ at91_set_A_periph(AT91_PIN_PC14, 0); /* RXD2 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+#endif
+
+#ifdef CONFIG_USART3 /* DBGU */
+ at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
+ at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+#endif
+}
+
+#ifdef CONFIG_CMD_NAND
+static void AT572D940HFEB_nand_hw_init(void)
+{
+ unsigned long csa;
+
+ /* Enable CS3 */
+ csa = at91_sys_read(AT91_MATRIX_EBICSA);
+ at91_sys_write(AT91_MATRIX_EBICSA,
+ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+ /* Configure SMC CS3 for NAND/SmartMedia */
+ at91_sys_write(AT91_SMC_SETUP(3),
+ AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
+ AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+ at91_sys_write(AT91_SMC_PULSE(3),
+ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
+ at91_sys_write(AT91_SMC_CYCLE(3),
+ AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
+ at91_sys_write(AT91_SMC_MODE(3),
+ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+ AT91_SMC_EXNWMODE_DISABLE |
+ AT91_SMC_DBW_8 | AT91_SMC_TDF_(2));
+
+ at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_PIOC);
+
+ /* Configure RDY/BSY */
+ at91_set_gpio_input(AT91_PIN_PC16, 1);
+
+ /* Enable NandFlash */
+ /* By DIP switch on AT572D940HFEB */
+ at91_set_gpio_output(AT91_PIN_PC14, 1);
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void AT572D940HFEB_spi_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
+ at91_set_A_periph(AT91_PIN_PA4, 0); /* SPI0_NPCS1 */
+
+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
+
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_SPI0);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void AT572D940HFEB_macb_hw_init(void)
+{
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_EMAC);
+
+ /* Need to reset PHY -> 500ms reset */
+#if 0
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
+ AT91_RSTC_URSTEN);
+
+ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+
+ /* Wait for end hardware reset */
+ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0 << 8)) |
+ AT91_RSTC_URSTEN);
+#endif
+
+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXCK_EREFCK */
+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
+ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERX0 */
+ at91_set_A_periph(AT91_PIN_PA19, 0); /* ERX1 */
+ at91_set_A_periph(AT91_PIN_PA20, 0); /* ERXER */
+ at91_set_A_periph(AT91_PIN_PA23, 0); /* ETXEN */
+ at91_set_A_periph(AT91_PIN_PA21, 0); /* ETX0 */
+ at91_set_A_periph(AT91_PIN_PA22, 0); /* ETX1 */
+ at91_set_A_periph(AT91_PIN_PA13, 0); /* EMDIO */
+ at91_set_A_periph(AT91_PIN_PA14, 0); /* EMDC */
+ at91_set_A_periph(AT91_PIN_PA15, 0); /* EFCE100 */
+}
+#endif
+
+#ifdef CONFIG_MMC
+static void AT572D940HFEB_mci_hw_init(void)
+{
+ at91_sys_write(AT91_PMC_PCER, (1 << AT572D940HF_ID_MCI));
+
+ at91_set_A_periph(AT91_PIN_PC22,0);
+ at91_set_A_periph(AT91_PIN_PC23,0);
+ at91_set_A_periph(AT91_PIN_PC24,0);
+ at91_set_A_periph(AT91_PIN_PC25,0);
+ at91_set_A_periph(AT91_PIN_PC26,0);
+ at91_set_A_periph(AT91_PIN_PC27,0);
+}
+#endif
+
+#ifdef CONFIG_USBH
+static void AT572D940HFEB_usbh_hw_init(void)
+{
+ at91_sys_write(AT91_PMC_PCER, (1 << AT572D940HF_ID_UHP));
+ at91_sys_write(AT91_PMC_SCER, AT572D940HF_PMC_UHP);
+}
+
+int rstc_init(void)
+{
+ /* Reads the SR to clean from
+ * previous resets
+ */
+ at91_sys_read(AT91_RSTC_SR);
+
+ /* Disble the USR_RST line,
+ * enable USR_RST_INT and
+ * sets the EXT_RST length to 2^14
+ * (500ms needed by the phy)
+ */
+ at91_sys_write(AT91_RSTC_MR, (0xa5<<24) | (13<<8) | AT91_RSTC_URSTIEN);
+ return 0;
+}
+
+int board_init(void)
+{
+
+ /* Init the reset controller */
+ rstc_init();
+
+ /* Init interrupts */
+ interrupts_init();
+
+ /* Enable Ctrlc */
+ console_init_f();
+
+ /* arch number of AT572D940HFEB-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT572D940HFEB;
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+ AT572D940HFEB_serial_hw_init();
+
+#ifdef CONFIG_CMD_NAND
+ AT572D940HFEB_nand_hw_init();
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+ AT572D940HFEB_spi_hw_init();
+#endif
+
+#ifdef CONFIG_MACB
+ AT572D940HFEB_macb_hw_init();
+#endif
+
+#ifdef CONFIG_MMC
+ AT572D940HFEB_mci_hw_init();
+#endif
+
+#ifdef CONFIG_USBH
+ AT572D940HFEB_usbh_hw_init();
+#endif
+
+#endif
+ gd->flags |= GD_FLG_RELOC;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+ return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_MACB
+ /*
+ * Initialize ethernet HW addr prior to starting Linux,
+ * needed for nfsroot
+ */
+ eth_init(gd->bd);
+#endif /* CONFIG_MACB */
+}
+#endif /* CONFIG_RESET_PHY_R */
+
+#endif /* CONFIG_CMD_NET */
diff --git a/board/atmel/at572d940hfeb/config.mk
b/board/atmel/at572d940hfeb/config.mk
new file mode 100644
index 0000000..ff2cfd1
--- /dev/null
+++ b/board/atmel/at572d940hfeb/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x23f00000
diff --git a/board/atmel/at572d940hfeb/flash.c
b/board/atmel/at572d940hfeb/flash.c
new file mode 100644
index 0000000..0d06dae
--- /dev/null
+++ b/board/atmel/at572d940hfeb/flash.c
@@ -0,0 +1,509 @@
+/*
+ * (C) Copyright 2002
+ * Lineo, Inc. <www.lineo.com>
+ * Bernhard Kuhn <[EMAIL PROTECTED]>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <[EMAIL PROTECTED]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+ulong myflush(void);
+
+
+/* Flash Organization Structure */
+typedef struct OrgDef
+{
+ unsigned int sector_number;
+ unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+
+OrgDef OrgAT49BV642D[] =
+{
+ { 8, 4*1024 },
+ { 58, 32*1024 },
+};
+
+OrgDef OrgAT49BV16x4[] =
+{
+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
+ { 2, 32*1024 }, /* 2 * 32 kBytes sectors */
+ { 30, 64*1024 }, /* 30 * 64 kBytes sectors */
+};
+
+OrgDef OrgAT49BV16x4A[] =
+{
+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
+ { 31, 64*1024 }, /* 31 * 64 kBytes sectors */
+};
+
+OrgDef OrgAT49BV6416[] =
+{
+ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
+ { 127, 64*1024 }, /* 127 * 64 kBytes sectors */
+};
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+/* AT49BV1614A Codes */
+#define FLASH_CODE1 0xAA
+#define FLASH_CODE2 0x55
+#define ID_IN_CODE 0x90
+#define ID_OUT_CODE 0xF0
+
+
+#define CMD_READ_ARRAY 0x00F0
+#define CMD_UNLOCK1 0x00AA
+#define CMD_UNLOCK2 0x0055
+#define CMD_ERASE_SETUP 0x0080
+#define CMD_ERASE_CONFIRM 0x0030
+#define CMD_PROGRAM 0x00A0
+#define CMD_UNLOCK_BYPASS 0x0020
+#define CMD_SECTOR_UNLOCK 0x0070
+
+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE +
(0x00005555<<1)))
+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE +
(0x00002AAA<<1)))
+
+#define BIT_ERASE_DONE 0x0080
+#define BIT_RDY_MASK 0x0080
+#define BIT_PROGRAM_ERROR 0x0020
+#define BIT_TIMEOUT 0x80000000 /* our flag */
+
+#define READY 1
+#define ERR 2
+#define TMO 4
+
+/*-----------------------------------------------------------------------
+ */
+void flash_identification (flash_info_t * info)
+{
+ volatile u16 manuf_code, device_code, add_device_code;
+
+ MEM_FLASH_ADDR1 = FLASH_CODE1;
+ MEM_FLASH_ADDR2 = FLASH_CODE2;
+ MEM_FLASH_ADDR1 = ID_IN_CODE;
+
+ manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
+ device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
+ add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
+
+ MEM_FLASH_ADDR1 = FLASH_CODE1;
+ MEM_FLASH_ADDR2 = FLASH_CODE2;
+ MEM_FLASH_ADDR1 = ID_OUT_CODE;
+
+ /* Vendor type */
+ info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
+ printf ("Atmel: ");
+
+ if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK))
{
+
+ if ((add_device_code & FLASH_TYPEMASK) ==
+ (ATM_ID_BV1614A & FLASH_TYPEMASK)) {
+ info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
+ printf ("AT49BV1614A (16Mbit)\n");
+ } else { /* AT49BV1614 Flash */
+ info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
+ printf ("AT49BV1614 (16Mbit)\n");
+ }
+
+ } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 &
FLASH_TYPEMASK)) {
+ info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
+ printf ("AT49BV6416 (64Mbit)\n");
+ }
+}
+
+ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
+{
+ int i, nb_sectors = 0;
+
+ for (i=0; i<nb_blocks; i++){
+ nb_sectors += pOrgDef[i].sector_number;
+ }
+
+ return nb_sectors;
+}
+
+void flash_unlock_sector(flash_info_t * info, unsigned int sector)
+{
+ volatile u16 *addr = (volatile u16 *) (info->start[sector]);
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ *addr = CMD_SECTOR_UNLOCK;
+}
+
+
+ulong flash_init (void)
+{
+ int i, j, k;
+ unsigned int flash_nb_blocks, sector;
+ unsigned int start_address;
+ OrgDef *pOrgDef;
+
+ ulong size = 0;
+
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ ulong flashbase = 0;
+
+ flash_identification (&flash_info[i]);
+
+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+ (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
+
+ pOrgDef = OrgAT49BV16x4;
+ flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof
(OrgDef);
+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+ (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A
Flash */
+
+ pOrgDef = OrgAT49BV16x4A;
+ flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof
(OrgDef);
+ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416
Flash */
+
+ pOrgDef = OrgAT49BV6416;
+ flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof
(OrgDef);
+ } else {
+ flash_nb_blocks = 0;
+ pOrgDef = OrgAT49BV16x4;
+ }
+
+ flash_info[i].sector_count = flash_number_sector(pOrgDef,
flash_nb_blocks);
+ memset (flash_info[i].protect, 0, flash_info[i].sector_count);
+
+ if (i == 0)
+ flashbase = PHYS_FLASH_1;
+ else
+ panic ("configured too many flash banks!\n");
+
+ sector = 0;
+ start_address = flashbase;
+ flash_info[i].size = 0;
+
+ for (j = 0; j < flash_nb_blocks; j++) {
+ for (k = 0; k < pOrgDef[j].sector_number; k++) {
+ flash_info[i].start[sector++] = start_address;
+ start_address += pOrgDef[j].sector_size;
+ flash_info[i].size += pOrgDef[j].sector_size;
+ }
+ }
+
+ size += flash_info[i].size;
+
+ if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416
Flash */
+
+ /* Unlock all sectors at reset */
+ for (j=0; j<flash_info[i].sector_count; j++){
+ flash_unlock_sector(&flash_info[i], j);
+ }
+ }
+ }
+
+ /* Protect binary boot image */
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_FLASH_BASE,
+ CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
+
+ /* Protect environment variables */
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+
+ /* Protect U-Boot gzipped image */
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_U_BOOT_BASE,
+ CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case (ATM_MANUFACT & FLASH_VENDMASK):
+ printf ("Atmel: ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (ATM_ID_BV1614 & FLASH_TYPEMASK):
+ printf ("AT49BV1614 (16Mbit)\n");
+ break;
+ case (ATM_ID_BV1614A & FLASH_TYPEMASK):
+ printf ("AT49BV1614A (16Mbit)\n");
+ break;
+ case (ATM_ID_BV6416 & FLASH_TYPEMASK):
+ printf ("AT49BV6416 (64Mbit)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ return;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; i++) {
+ if ((i % 5) == 0) {
+ printf ("\n ");
+ }
+ printf (" %08lX%s", info->start[i],
+ info->protect[i] ? " (RO)" : " ");
+ }
+ printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ ulong result;
+ int iflag, cflag, prot, sect;
+ int rc = ERR_OK;
+ int chip1;
+
+ /* first look for protection bits */
+
+ if (info->flash_id == FLASH_UNKNOWN)
+ return ERR_UNKNOWN_FLASH_TYPE;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ return ERR_INVAL;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) !=
+ (ATM_MANUFACT & FLASH_VENDMASK)) {
+ return ERR_UNKNOWN_FLASH_VENDOR;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot)
+ return ERR_PROTECTED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ cflag = icache_status ();
+ icache_disable ();
+ iflag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
+ printf ("Erasing sector %2d ... ", sect);
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ if (info->protect[sect] == 0) { /* not protected */
+ volatile u16 *addr = (volatile u16 *)
(info->start[sect]);
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ *addr = CMD_ERASE_CONFIRM;
+
+ /* wait until flash is ready */
+ chip1 = 0;
+
+ do {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT)
{
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+ chip1 = TMO;
+ break;
+ }
+
+ if (!chip1 && (result & 0xFFFF) &
BIT_ERASE_DONE)
+ chip1 = READY;
+
+ } while (!chip1);
+
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+ if (chip1 == ERR) {
+ rc = ERR_PROG_ERROR;
+ goto outahere;
+ }
+ if (chip1 == TMO) {
+ rc = ERR_TIMOUT;
+ goto outahere;
+ }
+
+ printf ("ok.\n");
+ } else { /* it was protected */
+ printf ("protected!\n");
+ }
+ }
+
+ if (ctrlc ())
+ printf ("User Interrupt!\n");
+
+outahere:
+ /* allow flash to settle - wait 10 ms */
+ udelay_masked (10000);
+
+ if (iflag)
+ enable_interrupts ();
+
+ if (cflag)
+ icache_enable ();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash
+ */
+
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+ volatile u16 *addr = (volatile u16 *) dest;
+ ulong result;
+ int rc = ERR_OK;
+ int cflag, iflag;
+ int chip1;
+
+ /*
+ * Check if Flash is (sufficiently) erased
+ */
+ result = *addr;
+ if ((result & data) != data)
+ return ERR_NOT_ERASED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ cflag = icache_status ();
+ icache_disable ();
+ iflag = disable_interrupts ();
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_PROGRAM;
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ /* wait until flash is ready */
+ chip1 = 0;
+ do {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+ chip1 = ERR | TMO;
+ break;
+ }
+ if (!chip1 && ((result & 0x80) == (data & 0x80)))
+ chip1 = READY;
+
+ } while (!chip1);
+
+ *addr = CMD_READ_ARRAY;
+
+ if (chip1 == ERR || *addr != data)
+ rc = ERR_PROG_ERROR;
+
+ if (iflag)
+ enable_interrupts ();
+
+ if (cflag)
+ icache_enable ();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash.
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong wp, data;
+ int rc;
+
+ if (addr & 1) {
+ printf ("unaligned destination not supported\n");
+ return ERR_ALIGN;
+ };
+
+ if ((int) src & 1) {
+ printf ("unaligned source not supported\n");
+ return ERR_ALIGN;
+ };
+
+ wp = addr;
+
+ while (cnt >= 2) {
+ data = *((volatile u16 *) src);
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ src += 2;
+ wp += 2;
+ cnt -= 2;
+ }
+
+ if (cnt == 1) {
+ data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1))
<<
+
8);
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ src += 1;
+ wp += 1;
+ cnt -= 1;
+ };
+
+ return ERR_OK;
+}
diff --git a/board/atmel/at572d940hfeb/interrupts.c
b/board/atmel/at572d940hfeb/interrupts.c
new file mode 100644
index 0000000..c96e75e
--- /dev/null
+++ b/board/atmel/at572d940hfeb/interrupts.c
@@ -0,0 +1,81 @@
+/*
+ * board/atmel/at572d940hfeb/interrupts.c
+ * Copyright 2008 (C) ATMEL
+ * Antonio R. Costa <antonio.costa <at> atmel.com>
+ * <costa.antonior <at> gmail.com>
+ *
+ * Advanced Interrupt Controller (AIC).
+ * Based on AT572D940HF datasheet.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <common.h>
+#include <asm/arch/at572d940hf.h>
+#include <asm/arch/io.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_aic.h>
+#include <asm/arch/interrupts.h>
+
+irq_handler_t handler_reset(void)
+{
+ unsigned long rstc_sr=0;
+
+ rstc_sr = at91_sys_read(AT91_RSTC_SR);
+ if(rstc_sr & AT91_RSTC_URSTS) {
+ while(!(at91_sys_read(AT91_RSTC_SR) & (1<<16)));
+ reset_cpu(1);
+ };
+}
+
+irq_handler_t handler_ext1(void)
+{
+ puts("--- EXT1 IRQ ---\n");
+}
+
+
+int reset_irqs(void) {
+ unsigned long ul = 0;
+ volatile unsigned long * psrc = _armboot_start;
+ volatile unsigned long * pdest = 0x0;
+
+ // Relocates U-Boot ARM IRQ vectors to 0
+ // This is an ugly way to do it.
+ // More support must be offered by start.S
+ // on symbols and macros performing partial relocation
+
+ while(ul++ < 16)
+ *pdest++ = *psrc++;
+
+
+ // Reset IRQ vectors
+ for(ul=0;ul<32;ul++)
+ RESET_IRQ_HANDLER(ul);
+ return 0;
+}
+
+int interrupts_init(void)
+{
+ reset_irqs();
+ SET_IRQ_HANDLER(1 ,0x27,handler_reset);
+ SET_IRQ_HANDLER(30,0x27,handler_ext1);
+ return 0;
+}
+
+
+void do_irq(struct pt_regs* pregs) {
+
+ unsigned long int ivr = AIC_REG(AIC_IVR);
+ unsigned long int isr = AIC_REG(AIC_ISR);
+ void (*irq_handler)(unsigned long int) = (void(*)(unsigned long int))
ivr;
+
+ irq_handler(isr);
+
+ /* Acknowledges irq */
+ IRQ_ACKNOWLEDGE(ivr);
+
+ return;
+};
diff --git a/board/atmel/at572d940hfeb/nand.c b/board/atmel/at572d940hfeb/nand.c
new file mode 100644
index 0000000..0f8dcb9
--- /dev/null
+++ b/board/atmel/at572d940hfeb/nand.c
@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at572d940hf.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
+
+#include <nand.h>
+
+/*
+ * hardware specific access to control-lines
+ */
+#define MASK_ALE (1 << 21) /* our ALE is AD21 */
+#define MASK_CLE (1 << 22) /* our CLE is AD22 */
+
+static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ IO_ADDR_W |= MASK_CLE;
+ break;
+ case NAND_CTL_SETALE:
+ IO_ADDR_W |= MASK_ALE;
+ break;
+ case NAND_CTL_CLRNCE:
+ at91_set_gpio_value(AT91_PIN_PC14, 1);
+ break;
+ case NAND_CTL_SETNCE:
+ at91_set_gpio_value(AT91_PIN_PC14, 0);
+ break;
+ }
+ this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
+{
+ return at91_get_gpio_value(AT91_PIN_PC13);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ nand->eccmode = NAND_ECC_SOFT;
+ nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
+ nand->dev_ready = at91sam9260ek_nand_ready;
+ nand->chip_delay = 20;
+
+ return 0;
+}
diff --git a/board/atmel/at572d940hfeb/partition.c
b/board/atmel/at572d940hfeb/partition.c
new file mode 100644
index 0000000..389fb2c
--- /dev/null
+++ b/board/atmel/at572d940hfeb/partition.c
@@ -0,0 +1,38 @@
+/*
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
+ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
+ {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
+ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
+ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
+ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
+ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
+};
diff --git a/board/atmel/at572d940hfeb/u-boot.lds
b/board/atmel/at572d940hfeb/u-boot.lds
new file mode 100644
index 0000000..05a6d83
--- /dev/null
+++ b/board/atmel/at572d940hfeb/u-boot.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
--
1.5.4.3
-------------------------------------------------------------------------
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