On Wed, Mar 13, 2013 at 3:34 PM, Stephen Warren <[email protected]> wrote: > On 03/13/2013 04:10 PM, Tom Warren wrote: >> This caused CAM_MCLK's pinmux reg to be locked out, since the >> table parsing code couldn't find a matching entry for VI_ALT3 >> and wrote garbage to the register. > >> diff --git a/arch/arm/cpu/tegra114-common/pinmux.c >> b/arch/arm/cpu/tegra114-common/pinmux.c > >> @@ -239,7 +239,7 @@ const struct tegra_pingroup_desc >> tegra_soc_pingroups[PINGRP_COUNT] = { > >> - PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4), >> + PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4), > > This doesn't seem right; the "alt" settings should be assigned in order > non-alt, alt1, alt2, alt3.
According to the TRM, CAM_MCLK takes the following 4 possible mux settings: 0 = VI 1 = VI_ALT1 2 = VI_ALT3 3 = RSVD3 There is no VI_ALT2 in the Tegra114 TRM. There was in the T30 TRM. > > You say, "the table parsing code couldn't find a matching entry for > VI_ALT3". What was looking for that entry? The pinmux table entry in board/nvidia/dalmore/pinmux-config-dalmore.h, table tegra114_pinmux_common[], VI_PINMUX(CAM_MCLK, VI_ALT3, ...), which is parsed by pinmux_config_pingroup in pinmux.c. > > Also, shouldn't the pinmux driver be fixed not to write garbage to a > register, but instead return an error, if it can't find the table entry > it's looking for? There's an assert if the mux isn't found - I thought that would handle it, but it appears that it will only if DEBUG is enabled. I'll add more error checking to the code - I have a pinmux.c/pinmux.h update coming for other problems I found while chasing this down. Tom _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
