On 03/13/2013 04:55 PM, Tom Warren wrote: > On Wed, Mar 13, 2013 at 3:34 PM, Stephen Warren <[email protected]> wrote: >> On 03/13/2013 04:10 PM, Tom Warren wrote: >>> This caused CAM_MCLK's pinmux reg to be locked out, since the >>> table parsing code couldn't find a matching entry for VI_ALT3 >>> and wrote garbage to the register. >> >>> diff --git a/arch/arm/cpu/tegra114-common/pinmux.c >>> b/arch/arm/cpu/tegra114-common/pinmux.c >> >>> @@ -239,7 +239,7 @@ const struct tegra_pingroup_desc >>> tegra_soc_pingroups[PINGRP_COUNT] = { >> >>> - PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4), >>> + PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4), >> >> This doesn't seem right; the "alt" settings should be assigned in order >> non-alt, alt1, alt2, alt3. > > According to the TRM, CAM_MCLK takes the following 4 possible mux settings: > > 0 = VI > 1 = VI_ALT1 > 2 = VI_ALT3 > 3 = RSVD3 > > There is no VI_ALT2 in the Tegra114 TRM. There was in the T30 TRM.
Uggh, yes. The TRM is screwed up. Best to match it though I suppose. So, the change is fine, and ends up matching the kernel's pinmux table too. It might be a good idea to check for any other diffs. _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
