On 7/30/2013 1:23 PM, Heiko Schocher wrote:
> Signed-off-by: Heiko Schocher <[email protected]>
>
> ---
> - changes for v2:
> defined all bits used in the gmii_sel register as
> Tom Rini suggested
> - changes for v3:
> rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
> ---
> arch/arm/include/asm/arch-am33xx/cpu.h | 21 +++++++++++++++++++++
> board/isee/igep0033/board.c | 6 ++----
> board/phytec/pcm051/board.c | 2 --
> board/ti/am335x/board.c | 6 +-----
> 4 Dateien geändert, 24 Zeilen hinzugefügt(+), 11 Zeilen entfernt(-)
>
> diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
> b/arch/arm/include/asm/arch-am33xx/cpu.h
> index bcb4c50..945a09b 100644
> --- a/arch/arm/include/asm/arch-am33xx/cpu.h
> +++ b/arch/arm/include/asm/arch-am33xx/cpu.h
> @@ -336,6 +336,27 @@ struct ctrl_dev {
> unsigned int resv4[4];
> unsigned int miisel; /* offset 0x50 */
> };
> +
> +/* gmii_sel register defines */
> +#define GMII1_SEL_MII 0x0
> +#define GMII1_SEL_RMII 0x1
> +#define GMII1_SEL_RGMII 0x2
> +#define GMII1_SEL_NOTUSED 0x3
NOTUSED not needed as it is not supposed to be used.
> +#define GMII2_SEL_MII 0x0
> +#define GMII2_SEL_RMII 0x4
> +#define GMII2_SEL_RGMII 0x8
> +#define GMII2_SEL_NOTUSED 0xc
NOTUSED not needed as it is not supposed to be used.
> +#define RGMII1_IDMODE BIT(4)
> +#define RGMII2_IDMODE BIT(5)
> +#define RMII1_IO_CLK_EN BIT(6)
> +#define RMII2_IO_CLK_EN BIT(7)
> +
> +#define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII)
> +#define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)
> +#define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII)
> +#define RGMII_INT_DELAY (RGMII1_IDMODE | RGMII2_IDMODE)
> +#define RMII_CHIPCKL_ENABLE (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)
> +
> #endif /* __ASSEMBLY__ */
> #endif /* __KERNEL_STRICT_NAMES */
>
> diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
> index f71aaa0..bdb4745 100644
> --- a/board/isee/igep0033/board.c
> +++ b/board/isee/igep0033/board.c
> @@ -27,9 +27,6 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -/* MII mode defines */
> -#define RMII_MODE_ENABLE 0x4D
> -
> static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
>
> #ifdef CONFIG_SPL_BUILD
> @@ -158,7 +155,8 @@ int board_eth_init(bd_t *bis)
> eth_setenv_enetaddr("ethaddr", mac_addr);
> }
>
> - writel(RMII_MODE_ENABLE, &cdev->miisel);
> + writel((GMII1_SEL_RMII | GMII2_SEL_NOTUSED | RMII1_IO_CLK_EN),
> + &cdev->miisel);
>
> rv = cpsw_register(&cpsw_data);
> if (rv < 0)
> diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
> index f3bad76..275fe82 100644
> --- a/board/phytec/pcm051/board.c
> +++ b/board/phytec/pcm051/board.c
> @@ -31,8 +31,6 @@
> DECLARE_GLOBAL_DATA_PTR;
>
> /* MII mode defines */
> -#define MII_MODE_ENABLE 0x0
> -#define RGMII_MODE_ENABLE 0xA
> #define RMII_RGMII2_MODE_ENABLE 0x49
>
> static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
> index eac9cc9..b2bec34 100644
> --- a/board/ti/am335x/board.c
> +++ b/board/ti/am335x/board.c
> @@ -30,10 +30,6 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -/* MII mode defines */
> -#define MII_MODE_ENABLE 0x0
> -#define RGMII_MODE_ENABLE 0x3A
> -
> /* GPIO that controls power to DDR on EVM-SK */
> #define GPIO_DDR_VTT_EN 7
>
> @@ -460,7 +456,7 @@ int board_eth_init(bd_t *bis)
> cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
> PHY_INTERFACE_MODE_MII;
> } else {
> - writel(RGMII_MODE_ENABLE, &cdev->miisel);
> + writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
> cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
> PHY_INTERFACE_MODE_RGMII;
> }
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