Hi,

When using 'nandecc hw' on an OMAP3 platform, data is not being
correctly written to NAND.  I see the issue on 2013.10-rc2 and 2013.07
but not on 2012.10.  Specifically, when I read back a SPL binary
written with hardware Hamming ECC, I don't get a matching CRC.  With
the BCH8 ECC algorithm, the CRC is correct (but SPL must be written
with Hamming otherwise the board doesn't boot)

I've shown my steps here: http://pastebin.com/tLZsr9zH
The expected CRC is 46745188.

Any suggestions/ideas much appreciated!

--Ash
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