this add multi devices support and merge dm9000's eeprom command support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: TsiChung Liew <[email protected]>
Cc: Konstantin Kletschke <[email protected]>
Cc: Stelian Pop <[email protected]>
---
board/atmel/at91sam9261ek/at91sam9261ek.c | 17 +-
board/freescale/m5253demo/m5253demo.c | 10 +
board/scb9328/scb9328.c | 9 +
board/trizepsiv/Makefile | 2 +-
board/trizepsiv/conxs.c | 10 +
board/trizepsiv/eeprom.c | 84 -----
drivers/net/dm9000x.c | 469 ++++++++++++++++++-----------
include/configs/M5253DEMO.h | 3 +-
include/configs/at91sam9261ek.h | 5 +-
include/configs/scb9328.h | 3 +-
include/configs/trizepsiv.h | 4 +-
include/netdev.h | 1 +
12 files changed, 341 insertions(+), 276 deletions(-)
delete mode 100644 board/trizepsiv/eeprom.c
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c
b/board/atmel/at91sam9261ek/at91sam9261ek.c
index a89cb8b..6aec5c6 100644
--- a/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ b/board/atmel/at91sam9261ek/at91sam9261ek.c
@@ -34,9 +34,7 @@
#include <asm/arch/io.h>
#include <lcd.h>
#include <atmel_lcdc.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
-#include <net.h>
-#endif
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -234,15 +232,10 @@ int dram_init(void)
return 0;
}
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
#ifdef CONFIG_DRIVER_DM9000
- /*
- * Initialize ethernet HW addr prior to starting Linux,
- * needed for nfsroot
- */
- eth_init(gd->bd);
-#endif
+int board_eth_init(bd_t *bis)
+{
+ return dm9000_eth_initialize(0, (u32*)CONFIG_DM9000_BASE,
+ (u32*)(CONFIG_DM9000_BASE + 4));
}
#endif
diff --git a/board/freescale/m5253demo/m5253demo.c
b/board/freescale/m5253demo/m5253demo.c
index b39cd4d..25d6f9e 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -25,6 +25,8 @@
*/
#include <common.h>
+#include <netdev.h>
+
#include <asm/immap.h>
int checkboard(void)
@@ -138,3 +140,11 @@ void ide_set_reset(int idereset)
}
}
#endif /* CONFIG_CMD_IDE */
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+ return dm9000_eth_initialize(0, (u32*)CONFIG_DM9000_BASE,
+ (u32*)(CONFIG_DM9000_BASE + 4));
+}
+#endif
diff --git a/board/scb9328/scb9328.c b/board/scb9328/scb9328.c
index 3f6831b..1e8ea67 100644
--- a/board/scb9328/scb9328.c
+++ b/board/scb9328/scb9328.c
@@ -19,6 +19,7 @@
*/
#include <common.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -70,3 +71,11 @@ void show_boot_progress (int status)
{
return;
}
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+ return dm9000_eth_initialize(0, (u32*)CONFIG_DM9000_BASE,
+ (u32*)(CONFIG_DM9000_BASE + 4));
+}
+#endif
diff --git a/board/trizepsiv/Makefile b/board/trizepsiv/Makefile
index 44c0d49..b105dd7 100644
--- a/board/trizepsiv/Makefile
+++ b/board/trizepsiv/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := conxs.o eeprom.o
+COBJS := conxs.o
SOBJS := lowlevel_init.o pxavoltage.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/trizepsiv/conxs.c b/board/trizepsiv/conxs.c
index 7c6c855..272f7b6 100644
--- a/board/trizepsiv/conxs.c
+++ b/board/trizepsiv/conxs.c
@@ -32,6 +32,8 @@
*/
#include <common.h>
+#include <netdev.h>
+
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -144,3 +146,11 @@ int dram_init (void)
return 0;
}
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+ return dm9000_eth_initialize(0, (u32*)CONFIG_DM9000_BASE,
+ (u32*)(CONFIG_DM9000_BASE + 0x8004));
+}
+#endif
diff --git a/board/trizepsiv/eeprom.c b/board/trizepsiv/eeprom.c
deleted file mode 100644
index 63f1c6c..0000000
--- a/board/trizepsiv/eeprom.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2007
- * Stefano Babic, DENX Software Engineering, [email protected].
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-
-extern u16 read_srom_word(int);
-extern void write_srom_word(int offset, u16 val);
-
-static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[]) {
- int i;
-
- for (i=0; i < 0x40; i++) {
- if (!(i % 0x10))
- printf("\n%08lx:", i);
- printf(" %04x", read_srom_word(i));
- }
- printf ("\n");
- return (0);
-}
-
-static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[]) {
- int offset,value;
-
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
-
- offset=simple_strtoul(argv[2],NULL,16);
- value=simple_strtoul(argv[3],NULL,16);
- if (offset > 0x40) {
- printf("Wrong offset : 0x%x\n",offset);
- cmd_usage(cmdtp);
- return 1;
- }
- write_srom_word(offset, value);
- return (0);
-}
-
-int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
-
- if (strcmp (argv[1],"read") == 0) {
- return (do_read_dm9000_eeprom(cmdtp,flag,argc,argv));
- } else if (strcmp (argv[1],"write") == 0) {
- return (do_write_dm9000_eeprom(cmdtp,flag,argc,argv));
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
-}
-
-U_BOOT_CMD(
- dm9000ee,4,1,do_dm9000_eeprom,
- "Read/Write eeprom connected to Ethernet Controller",
- "\ndm9000ee write <word offset> <value> \n"
- "\tdm9000ee read \n"
- "\tword:\t\t00-02 : MAC Address\n"
- "\t\t\t03-07 : DM9000 Configuration\n"
- "\t\t\t08-63 : User data\n");
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 8ca2bf7..61ca492 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -1,6 +1,11 @@
/*
dm9000.c: Version 1.2 12/15/2003
+ Add eemprom command support
+
+ (C) Copyright 2007
+ Stefano Babic, DENX Software Engineering, [email protected].
+
A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
Copyright (C) 1997 Sten Wang
@@ -61,6 +66,8 @@ TODO: external MII is not functional, only internal at the
moment.
#include <common.h>
#include <command.h>
#include <net.h>
+#include <netdev.h>
+#include <malloc.h>
#include <asm/io.h>
#include "dm9000x.h"
@@ -88,6 +95,8 @@ TODO: external MII is not functional, only internal at the
moment.
/* Structure/enum declaration ------------------------------- */
typedef struct board_info {
+ u32 *io_addr;
+ u32 *data_addr;
u32 runt_length_counter; /* counter: RX length < 64byte */
u32 long_length_counter; /* counter: RX length > 1514byte */
u32 reset_counter; /* counter: RESET */
@@ -99,23 +108,20 @@ typedef struct board_info {
u8 phy_addr;
u8 device_wait_reset; /* device state */
unsigned char srom[128];
- void (*outblk)(volatile void *data_ptr, int count);
- void (*inblk)(void *data_ptr, int count);
- void (*rx_status)(u16 *RxStatus, u16 *RxLen);
+ void (*outblk)(struct board_info *db, volatile void *data_ptr, int
count);
+ void (*inblk)(struct board_info *db, void *data_ptr, int count);
+ void (*rx_status)(struct board_info *db, u16 *RxStatus, u16 *RxLen);
+ struct eth_device netdev;
} board_info_t;
-static board_info_t dm9000_info;
+#define to_board_info(_nd) container_of(_nd, struct board_info, netdev)
/* function declaration ------------------------------------- */
-int eth_init(bd_t * bd);
-int eth_send(volatile void *, int);
-int eth_rx(void);
-void eth_halt(void);
-static int dm9000_probe(void);
-static u16 phy_read(int);
-static void phy_write(int, u16);
-static void read_srom_word(int, u8 *);
-static u8 DM9000_ior(int);
-static void DM9000_iow(int reg, u8 value);
+static u16 phy_read(struct board_info *db, int reg);
+static void phy_write(struct board_info *db, int reg, u16 value);
+static void read_srom_word(struct eth_device *netdev, int offset, u8 *to);
+static void write_srom_word(struct eth_device *netdev, int offset, u16 val);
+static u8 DM9000_ior(struct board_info *db, int reg);
+static void DM9000_iow(struct board_info *db, int reg, u8 value);
/* DM9000 network board routine ---------------------------- */
@@ -127,112 +133,115 @@ static void DM9000_iow(int reg, u8 value);
#define DM9000_inl(r) (*(volatile u32 *)r)
#ifdef CONFIG_DM9000_DEBUG
-static void
-dump_regs(void)
+static void dump_regs(struct board_info *db)
{
DM9000_DBG("\n");
- DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0));
- DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(1));
- DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(2));
- DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(3));
- DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4));
- DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(5));
- DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(6));
- DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(DM9000_ISR));
+ DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(db, 0));
+ DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(db, 1));
+ DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(db, 2));
+ DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(db, 3));
+ DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(db, 4));
+ DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(db, 5));
+ DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(db, 6));
+ DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(db, DM9000_ISR));
DM9000_DBG("\n");
}
#endif
-static void dm9000_outblk_8bit(volatile void *data_ptr, int count)
+static void dm9000_outblk_8bit(struct board_info *db, volatile void *data_ptr,
+ int count)
{
int i;
for (i = 0; i < count; i++)
- DM9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA);
+ DM9000_outb((((u8 *) data_ptr)[i] & 0xff), db->data_addr);
}
-static void dm9000_outblk_16bit(volatile void *data_ptr, int count)
+static void dm9000_outblk_16bit(struct board_info *db, volatile void *data_ptr,
+ int count)
{
int i;
u32 tmplen = (count + 1) / 2;
for (i = 0; i < tmplen; i++)
- DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
+ DM9000_outw(((u16 *) data_ptr)[i], db->data_addr);
}
-static void dm9000_outblk_32bit(volatile void *data_ptr, int count)
+
+static void dm9000_outblk_32bit(struct board_info *db, volatile void *data_ptr,
+ int count)
{
int i;
u32 tmplen = (count + 3) / 4;
for (i = 0; i < tmplen; i++)
- DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
+ DM9000_outl(((u32 *) data_ptr)[i], db->data_addr);
}
-static void dm9000_inblk_8bit(void *data_ptr, int count)
+static void dm9000_inblk_8bit(struct board_info *db, void *data_ptr, int count)
{
int i;
for (i = 0; i < count; i++)
- ((u8 *) data_ptr)[i] = DM9000_inb(DM9000_DATA);
+ ((u8 *) data_ptr)[i] = DM9000_inb(db->data_addr);
}
-static void dm9000_inblk_16bit(void *data_ptr, int count)
+static void dm9000_inblk_16bit(struct board_info *db, void *data_ptr, int
count)
{
int i;
u32 tmplen = (count + 1) / 2;
for (i = 0; i < tmplen; i++)
- ((u16 *) data_ptr)[i] = DM9000_inw(DM9000_DATA);
+ ((u16 *) data_ptr)[i] = DM9000_inw(db->data_addr);
}
-static void dm9000_inblk_32bit(void *data_ptr, int count)
+
+static void dm9000_inblk_32bit(struct board_info *db, void *data_ptr, int
count)
{
int i;
u32 tmplen = (count + 3) / 4;
for (i = 0; i < tmplen; i++)
- ((u32 *) data_ptr)[i] = DM9000_inl(DM9000_DATA);
+ ((u32 *) data_ptr)[i] = DM9000_inl(db->data_addr);
}
-static void dm9000_rx_status_32bit(u16 *RxStatus, u16 *RxLen)
+static void dm9000_rx_status_32bit(struct board_info *db, u16 *RxStatus, u16
*RxLen)
{
u32 tmpdata;
- DM9000_outb(DM9000_MRCMD, DM9000_IO);
+ DM9000_outb(DM9000_MRCMD, db->io_addr);
- tmpdata = DM9000_inl(DM9000_DATA);
+ tmpdata = DM9000_inl(db->data_addr);
*RxStatus = __le16_to_cpu(tmpdata);
*RxLen = __le16_to_cpu(tmpdata >> 16);
}
-static void dm9000_rx_status_16bit(u16 *RxStatus, u16 *RxLen)
+static void dm9000_rx_status_16bit(struct board_info *db, u16 *RxStatus, u16
*RxLen)
{
- DM9000_outb(DM9000_MRCMD, DM9000_IO);
+ DM9000_outb(DM9000_MRCMD, db->io_addr);
- *RxStatus = __le16_to_cpu(DM9000_inw(DM9000_DATA));
- *RxLen = __le16_to_cpu(DM9000_inw(DM9000_DATA));
+ *RxStatus = __le16_to_cpu(DM9000_inw(db->data_addr));
+ *RxLen = __le16_to_cpu(DM9000_inw(db->data_addr));
}
-static void dm9000_rx_status_8bit(u16 *RxStatus, u16 *RxLen)
+static void dm9000_rx_status_8bit(struct board_info *db, u16 *RxStatus, u16
*RxLen)
{
- DM9000_outb(DM9000_MRCMD, DM9000_IO);
+ DM9000_outb(DM9000_MRCMD, db->io_addr);
*RxStatus =
- __le16_to_cpu(DM9000_inb(DM9000_DATA) +
- (DM9000_inb(DM9000_DATA) << 8));
+ __le16_to_cpu(DM9000_inb(db->data_addr) +
+ (DM9000_inb(db->data_addr) << 8));
*RxLen =
- __le16_to_cpu(DM9000_inb(DM9000_DATA) +
- (DM9000_inb(DM9000_DATA) << 8));
+ __le16_to_cpu(DM9000_inb(db->data_addr) +
+ (DM9000_inb(db->data_addr) << 8));
}
/*
Search DM9000 board, allocate space and register it
*/
-int
-dm9000_probe(void)
+static int dm9000_probe(struct board_info *db)
{
u32 id_val;
- id_val = DM9000_ior(DM9000_VIDL);
- id_val |= DM9000_ior(DM9000_VIDH) << 8;
- id_val |= DM9000_ior(DM9000_PIDL) << 16;
- id_val |= DM9000_ior(DM9000_PIDH) << 24;
+ id_val = DM9000_ior(db, DM9000_VIDL);
+ id_val |= DM9000_ior(db, DM9000_VIDH) << 8;
+ id_val |= DM9000_ior(db, DM9000_PIDL) << 16;
+ id_val |= DM9000_ior(db, DM9000_PIDH) << 24;
if (id_val == DM9000_ID) {
printf("dm9000 i/o: 0x%x, id: 0x%x \n", CONFIG_DM9000_BASE,
id_val);
@@ -245,8 +254,7 @@ dm9000_probe(void)
}
/* General Purpose dm9000 reset routine */
-static void
-dm9000_reset(void)
+static void dm9000_reset(struct board_info *db)
{
DM9000_DBG("resetting DM9000\n");
@@ -254,51 +262,70 @@ dm9000_reset(void)
see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */
/* DEBUG: Make all GPIO0 outputs, all others inputs */
- DM9000_iow(DM9000_GPCR, GPCR_GPIO0_OUT);
+ DM9000_iow(db, DM9000_GPCR, GPCR_GPIO0_OUT);
/* Step 1: Power internal PHY by writing 0 to GPIO0 pin */
- DM9000_iow(DM9000_GPR, 0);
+ DM9000_iow(db, DM9000_GPR, 0);
/* Step 2: Software reset */
- DM9000_iow(DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST));
+ DM9000_iow(db, DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST));
do {
DM9000_DBG("resetting the DM9000, 1st reset\n");
udelay(25); /* Wait at least 20 us */
- } while (DM9000_ior(DM9000_NCR) & 1);
+ } while (DM9000_ior(db, DM9000_NCR) & 1);
- DM9000_iow(DM9000_NCR, 0);
- DM9000_iow(DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST)); /* Issue a second
reset */
+ DM9000_iow(db, DM9000_NCR, 0);
+ DM9000_iow(db, DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST)); /* Issue a
second reset */
do {
DM9000_DBG("resetting the DM9000, 2nd reset\n");
udelay(25); /* Wait at least 20 us */
- } while (DM9000_ior(DM9000_NCR) & 1);
+ } while (DM9000_ior(db, DM9000_NCR) & 1);
/* Check whether the ethernet controller is present */
- if ((DM9000_ior(DM9000_PIDL) != 0x0) ||
- (DM9000_ior(DM9000_PIDH) != 0x90))
+ if ((DM9000_ior(db, DM9000_PIDL) != 0x0) ||
+ (DM9000_ior(db, DM9000_PIDH) != 0x90))
printf("ERROR: resetting DM9000 -> not responding\n");
}
+static int dm9000_set_hw_enetaddr(struct eth_device *netdev, bd_t *bd)
+{
+ struct board_info *db = to_board_info(netdev);
+ int i, oft;
+
+ /* fill device MAC address registers */
+ for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
+ DM9000_iow(db, oft, netdev->enetaddr[i]);
+ for (i = 0, oft = 0x16; i < 8; i++, oft++)
+ DM9000_iow(db, oft, 0xff);
+
+ /* read back mac, just to be sure */
+ for (i = 0, oft = 0x10; i < 6; i++, oft++)
+ DM9000_DBG("%02x:", DM9000_ior(db, oft));
+ DM9000_DBG("\n");
+
+ return 0;
+}
+
/* Initilize dm9000 board
*/
-int
-eth_init(bd_t * bd)
+static int dm9000_init(struct eth_device *netdev, bd_t * bd)
{
- int i, oft, lnk;
+ int i, lnk;
u8 io_mode;
- struct board_info *db = &dm9000_info;
+ struct board_info *db = to_board_info(netdev);
+ char enetvar[32];
uchar enetaddr[6];
- DM9000_DBG("eth_init()\n");
+ DM9000_DBG("dm9000_init()\n");
/* RESET device */
- dm9000_reset();
+ dm9000_reset(db);
- if (dm9000_probe() < 0)
+ if (dm9000_probe(db) < 0)
return -1;
/* Auto-detect 8/16/32 bit mode, ISR Bit 6+7 indicate bus width */
- io_mode = DM9000_ior(DM9000_ISR) >> 6;
+ io_mode = DM9000_ior(db, DM9000_ISR) >> 6;
switch (io_mode) {
case 0x0: /* 16-bit mode */
@@ -329,52 +356,44 @@ eth_init(bd_t * bd)
}
/* Program operating register, only internal phy supported */
- DM9000_iow(DM9000_NCR, 0x0);
+ DM9000_iow(db, DM9000_NCR, 0x0);
/* TX Polling clear */
- DM9000_iow(DM9000_TCR, 0);
+ DM9000_iow(db, DM9000_TCR, 0);
/* Less 3Kb, 200us */
- DM9000_iow(DM9000_BPTR, BPTR_BPHW(3) | BPTR_JPT_600US);
+ DM9000_iow(db, DM9000_BPTR, BPTR_BPHW(3) | BPTR_JPT_600US);
/* Flow Control : High/Low Water */
- DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8));
+ DM9000_iow(db, DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8));
/* SH FIXME: This looks strange! Flow Control */
- DM9000_iow(DM9000_FCR, 0x0);
+ DM9000_iow(db, DM9000_FCR, 0x0);
/* Special Mode */
- DM9000_iow(DM9000_SMCR, 0);
+ DM9000_iow(db, DM9000_SMCR, 0);
/* clear TX status */
- DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
+ DM9000_iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
/* Clear interrupt status */
- DM9000_iow(DM9000_ISR, ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS);
+ DM9000_iow(db, DM9000_ISR, ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS);
/* Set Node address */
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ sprintf(enetvar, netdev->num ? "eth%daddr" : "ethaddr", netdev->num);
+ if (!eth_getenv_enetaddr(enetvar, enetaddr)) {
#if !defined(CONFIG_AT91SAM9261EK)
for (i = 0; i < 3; i++)
- read_srom_word(i, enetaddr + 2 * i);
- eth_setenv_enetaddr("ethaddr", enetaddr);
+ read_srom_word(netdev, i, enetaddr + 2 * i);
+ eth_setenv_enetaddr(enetvar, enetaddr);
#endif
}
printf("MAC: %pM\n", enetaddr);
- /* fill device MAC address registers */
- for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
- DM9000_iow(oft, enetaddr[i]);
- for (i = 0, oft = 0x16; i < 8; i++, oft++)
- DM9000_iow(oft, 0xff);
-
- /* read back mac, just to be sure */
- for (i = 0, oft = 0x10; i < 6; i++, oft++)
- DM9000_DBG("%02x:", DM9000_ior(oft));
- DM9000_DBG("\n");
+ dm9000_set_hw_enetaddr(netdev, bd);
/* Activate DM9000 */
/* RX enable */
- DM9000_iow(DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
+ DM9000_iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
/* Enable TX/RX interrupt mask */
- DM9000_iow(DM9000_IMR, IMR_PAR);
+ DM9000_iow(db, DM9000_IMR, IMR_PAR);
i = 0;
- while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
+ while (!(phy_read(db, 1) & 0x20)) { /* autonegation complete bit */
udelay(1000);
i++;
if (i == 10000) {
@@ -384,7 +403,7 @@ eth_init(bd_t * bd)
}
/* see what we've got */
- lnk = phy_read(17) >> 12;
+ lnk = phy_read(db, 17) >> 12;
printf("operating at ");
switch (lnk) {
case 1:
@@ -411,39 +430,39 @@ eth_init(bd_t * bd)
Hardware start transmission.
Send a packet to media from the upper layer.
*/
-int
-eth_send(volatile void *packet, int length)
+static int dm9000_send(struct eth_device *netdev, volatile void *packet,
+ int length)
{
int tmo;
- struct board_info *db = &dm9000_info;
+ struct board_info *db = to_board_info(netdev);
- DM9000_DMP_PACKET("eth_send", packet, length);
+ DM9000_DMP_PACKET("dm9000_send", packet, length);
- DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
+ DM9000_iow(db, DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
/* Move data to DM9000 TX RAM */
- DM9000_outb(DM9000_MWCMD, DM9000_IO); /* Prepare for TX-data */
+ DM9000_outb(DM9000_MWCMD, db->io_addr); /* Prepare for TX-data */
/* push the data to the TX-fifo */
- (db->outblk)(packet, length);
+ (db->outblk)(db, packet, length);
/* Set TX length to DM9000 */
- DM9000_iow(DM9000_TXPLL, length & 0xff);
- DM9000_iow(DM9000_TXPLH, (length >> 8) & 0xff);
+ DM9000_iow(db, DM9000_TXPLL, length & 0xff);
+ DM9000_iow(db, DM9000_TXPLH, (length >> 8) & 0xff);
/* Issue TX polling command */
- DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
+ DM9000_iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
/* wait for end of transmission */
tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
- while ( !(DM9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
- !(DM9000_ior(DM9000_ISR) & IMR_PTM) ) {
+ while ( !(DM9000_ior(db, DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
+ !(DM9000_ior(db, DM9000_ISR) & IMR_PTM) ) {
if (get_timer(0) >= tmo) {
printf("transmission timeout\n");
break;
}
}
- DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
+ DM9000_iow(db, DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
DM9000_DBG("transmit done\n\n");
return 0;
@@ -453,47 +472,47 @@ eth_send(volatile void *packet, int length)
Stop the interface.
The interface is stopped when it is brought.
*/
-void
-eth_halt(void)
+static void dm9000_halt(struct eth_device *netdev)
{
- DM9000_DBG("eth_halt\n");
+ struct board_info *db = to_board_info(netdev);
+
+ DM9000_DBG("dm9000_halt\n");
/* RESET devie */
- phy_write(0, 0x8000); /* PHY RESET */
- DM9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
- DM9000_iow(DM9000_IMR, 0x80); /* Disable all interrupt */
- DM9000_iow(DM9000_RCR, 0x00); /* Disable RX */
+ phy_write(db, 0, 0x8000); /* PHY RESET */
+ DM9000_iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
+ DM9000_iow(db, DM9000_IMR, 0x80); /* Disable all interrupt */
+ DM9000_iow(db, DM9000_RCR, 0x00); /* Disable RX */
}
/*
Received a packet and pass to upper layer
*/
-int
-eth_rx(void)
+static int dm9000_recv(struct eth_device *netdev)
{
u8 rxbyte, *rdptr = (u8 *) NetRxPackets[0];
u16 RxStatus, RxLen = 0;
- struct board_info *db = &dm9000_info;
+ struct board_info *db = to_board_info(netdev);
/* Check packet ready or not, we must check
the ISR status first for DM9000A */
- if (!(DM9000_ior(DM9000_ISR) & 0x01)) /* Rx-ISR bit must be set. */
+ if (!(DM9000_ior(db, DM9000_ISR) & 0x01)) /* Rx-ISR bit must be set. */
return 0;
- DM9000_iow(DM9000_ISR, 0x01); /* clear PR status latched in bit 0 */
+ DM9000_iow(db, DM9000_ISR, 0x01); /* clear PR status latched in bit 0 */
/* There is _at least_ 1 package in the fifo, read them all */
for (;;) {
- DM9000_ior(DM9000_MRCMDX); /* Dummy read */
+ DM9000_ior(db, DM9000_MRCMDX); /* Dummy read */
/* Get most updated data,
only look at bits 0:1, See application notes DM9000 */
- rxbyte = DM9000_inb(DM9000_DATA) & 0x03;
+ rxbyte = DM9000_inb(db->data_addr) & 0x03;
/* Status check: this byte must be 0 or 1 */
if (rxbyte > DM9000_PKT_RDY) {
- DM9000_iow(DM9000_RCR, 0x00); /* Stop Device */
- DM9000_iow(DM9000_ISR, 0x80); /* Stop INT request */
+ DM9000_iow(db, DM9000_RCR, 0x00); /* Stop Device
*/
+ DM9000_iow(db, DM9000_ISR, 0x80); /* Stop INT
request */
printf("DM9000 error: status check fail: 0x%x\n",
rxbyte);
return 0;
@@ -505,13 +524,13 @@ eth_rx(void)
DM9000_DBG("receiving packet\n");
/* A packet ready now & Get status/length */
- (db->rx_status)(&RxStatus, &RxLen);
+ (db->rx_status)(db, &RxStatus, &RxLen);
DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
/* Move data from DM9000 */
/* Read received packet from RX SRAM */
- (db->inblk)(rdptr, RxLen);
+ (db->inblk)(db, rdptr, RxLen);
if ((RxStatus & 0xbf00) || (RxLen < 0x40)
|| (RxLen > DM9000_PKT_MAX)) {
@@ -526,10 +545,10 @@ eth_rx(void)
}
if (RxLen > DM9000_PKT_MAX) {
printf("rx length too big\n");
- dm9000_reset();
+ dm9000_reset(db);
}
} else {
- DM9000_DMP_PACKET("eth_rx", rdptr, RxLen);
+ DM9000_DMP_PACKET("dm9000_send", rdptr, RxLen);
DM9000_DBG("passing packet to upper layer\n");
NetReceive(NetRxPackets[0], RxLen);
@@ -538,65 +557,93 @@ eth_rx(void)
return 0;
}
+int dm9000_eth_initialize(int id, u32 *data_addr, u32 *io_addr)
+{
+ struct board_info *db;
+ struct eth_device *netdev;
+
+ db = malloc(sizeof(struct board_info));
+ if (!db) {
+ printf("Error: Failed to allocate memory for DM9000_%d\n", id);
+ return -1;
+ }
+ memset(db, 0, sizeof(struct board_info));
+
+ netdev = &db->netdev;
+
+ db->io_addr = io_addr;
+ db->data_addr = data_addr;
+
+ sprintf(netdev->name, "dm9000_%d", id);
+ netdev->init = dm9000_init;
+ netdev->halt = dm9000_halt;
+ netdev->send = dm9000_send;
+ netdev->recv = dm9000_recv;
+ netdev->set_hw_enetaddr = dm9000_set_hw_enetaddr;
+
+ eth_register(netdev);
+
+ return 0;
+}
+
/*
Read a word data from SROM
*/
-static void read_srom_word(int offset, u8 *to)
+static void read_srom_word(struct eth_device *netdev, int offset, u8 *to)
{
- DM9000_iow(DM9000_EPAR, offset);
- DM9000_iow(DM9000_EPCR, 0x4);
+ struct board_info *db = to_board_info(netdev);
+
+ DM9000_iow(db, DM9000_EPAR, offset);
+ DM9000_iow(db, DM9000_EPCR, 0x4);
udelay(8000);
- DM9000_iow(DM9000_EPCR, 0x0);
- to[0] = DM9000_ior(DM9000_EPDRL);
- to[1] = DM9000_ior(DM9000_EPDRH);
+ DM9000_iow(db, DM9000_EPCR, 0x0);
+ to[0] = DM9000_ior(db, DM9000_EPDRL);
+ to[1] = DM9000_ior(db, DM9000_EPDRH);
}
-void
-write_srom_word(int offset, u16 val)
+static void write_srom_word(struct eth_device *netdev, int offset, u16 val)
{
- DM9000_iow(DM9000_EPAR, offset);
- DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
- DM9000_iow(DM9000_EPDRL, (val & 0xff));
- DM9000_iow(DM9000_EPCR, 0x12);
+ struct board_info *db = to_board_info(netdev);
+
+ DM9000_iow(db, DM9000_EPAR, offset);
+ DM9000_iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
+ DM9000_iow(db, DM9000_EPDRL, (val & 0xff));
+ DM9000_iow(db, DM9000_EPCR, 0x12);
udelay(8000);
- DM9000_iow(DM9000_EPCR, 0);
+ DM9000_iow(db, DM9000_EPCR, 0);
}
-
/*
Read a byte from I/O port
*/
-static u8
-DM9000_ior(int reg)
+static u8 DM9000_ior(struct board_info *db, int reg)
{
- DM9000_outb(reg, DM9000_IO);
- return DM9000_inb(DM9000_DATA);
+ DM9000_outb(reg, db->io_addr);
+ return DM9000_inb(db->data_addr);
}
/*
Write a byte to I/O port
*/
-static void
-DM9000_iow(int reg, u8 value)
+static void DM9000_iow(struct board_info *db, int reg, u8 value)
{
- DM9000_outb(reg, DM9000_IO);
- DM9000_outb(value, DM9000_DATA);
+ DM9000_outb(reg, db->io_addr);
+ DM9000_outb(value, db->data_addr);
}
/*
Read a word from phyxcer
*/
-static u16
-phy_read(int reg)
+static u16 phy_read(struct board_info *db, int reg)
{
u16 val;
/* Fill the phyxcer register into REG_0C */
- DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
- DM9000_iow(DM9000_EPCR, 0xc); /* Issue phyxcer read command */
- udelay(100); /* Wait read complete */
- DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer read command */
- val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);
+ DM9000_iow(db, DM9000_EPAR, DM9000_PHY | reg);
+ DM9000_iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
+ udelay(100); /* Wait read complete */
+ DM9000_iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
+ val = (DM9000_ior(db, DM9000_EPDRH) << 8) | DM9000_ior(db,
DM9000_EPDRL);
/* The read data keeps on REG_0D & REG_0E */
DM9000_DBG("phy_read(0x%x): 0x%x\n", reg, val);
@@ -606,18 +653,102 @@ phy_read(int reg)
/*
Write a word to phyxcer
*/
-static void
-phy_write(int reg, u16 value)
+static void phy_write(struct board_info *db, int reg, u16 value)
{
/* Fill the phyxcer register into REG_0C */
- DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
+ DM9000_iow(db, DM9000_EPAR, DM9000_PHY | reg);
/* Fill the written data into REG_0D & REG_0E */
- DM9000_iow(DM9000_EPDRL, (value & 0xff));
- DM9000_iow(DM9000_EPDRH, ((value >> 8) & 0xff));
- DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
- udelay(500); /* Wait write complete */
- DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
+ DM9000_iow(db, DM9000_EPDRL, (value & 0xff));
+ DM9000_iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
+ DM9000_iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command
*/
+ udelay(500); /* Wait write complete */
+ DM9000_iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command
*/
DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value);
}
+
+#ifdef CONFIG_CMD_DM9000_EEPROM
+static
+int do_read_dm9000_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ struct eth_device *netdev;
+ int i;
+ u8 data;
+
+ if (argc < 3) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ netdev = eth_get_dev_by_name(argv[2]);
+ if(!netdev) {
+ puts ("No ethernet found.\n");
+ return 1;
+ }
+
+ for (i = 0; i < 0x40; i++) {
+ if (!(i % 0x10))
+ printf("\n%08x:", i);
+ read_srom_word(netdev, i, &data);
+ printf(" %04x", data);
+ }
+ printf ("\n");
+ return 0;
+}
+
+static
+int do_write_dm9000_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ struct eth_device *netdev;
+ int offset, value;
+
+ if (argc < 5) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ netdev = eth_get_dev_by_name(argv[2]);
+ if(!netdev) {
+ puts ("No ethernet found.\n");
+ return 1;
+ }
+
+ offset = simple_strtoul(argv[3], NULL, 16);
+ value = simple_strtoul(argv[4], NULL, 16);
+ if (offset > 0x40) {
+ printf("Wrong offset : 0x%x\n", offset);
+ cmd_usage(cmdtp);
+ return 1;
+ }
+ write_srom_word(netdev, offset, value);
+ return 0;
+}
+
+static
+int do_dm9000_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ if (argc < 3) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ if (strcmp (argv[1], "read") == 0) {
+ return (do_read_dm9000_eeprom(cmdtp, flag, argc, argv));
+ } else if (strcmp (argv[1], "write") == 0) {
+ return (do_write_dm9000_eeprom(cmdtp, flag, argc, argv));
+ } else {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+}
+
+U_BOOT_CMD(
+ dm9000ee,4,1,do_dm9000_eeprom,
+ "Read/Write eeprom connected to Ethernet Controller",
+ "\ndm9000ee write <name> <word offset> <value> \n"
+ "\tdm9000ee read <name>\n"
+ "\tword:\t\t00-02 : MAC Address\n"
+ "\t\t\t03-07 : DM9000 Configuration\n"
+ "\t\t\t08-63 : User data\n");
+#endif
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 1fea6c3..b61de14 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -91,9 +91,8 @@
#define CONFIG_DRIVER_DM9000
#ifdef CONFIG_DRIVER_DM9000
# define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
-# define DM9000_IO CONFIG_DM9000_BASE
-# define DM9000_DATA (CONFIG_DM9000_BASE + 4)
# undef CONFIG_DM9000_DEBUG
+# define CONFIG_NET_MULTI
# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
# define CONFIG_IPADDR 10.82.121.249
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index fdaa71c..dad825a 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -134,11 +134,8 @@
/* Ethernet */
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x30000000
-#define DM9000_IO CONFIG_DM9000_BASE
-#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
-#define CONFIG_DM9000_USE_16BIT 1
+#define CONFIG_NET_MULTI 1
#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_RESET_PHY_R 1
/* USB */
#define CONFIG_USB_ATMEL
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index 893c3d3..39e6a4a 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -257,8 +257,7 @@
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x16000000
-#define DM9000_IO CONFIG_DM9000_BASE
-#define DM9000_DATA (CONFIG_DM9000_BASE+4)
+#define CONFIG_NET_MULTI 1
/* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
f_ref=16,777MHz
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index 4917318..fce9079 100644
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -279,8 +279,8 @@
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x08000000
-#define DM9000_IO CONFIG_DM9000_BASE
-#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
+#define CONFIG_NET_MULTI 1
+#define CONFIG_CMD_DM9000_EEPROM
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_SYS_USB_OHCI_BOARD_INIT 1
diff --git a/include/netdev.h b/include/netdev.h
index 63cf730..07328fa 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -44,6 +44,7 @@ int cpu_eth_init(bd_t *bis);
int au1x00_enet_initialize(bd_t*);
int bfin_EMAC_initialize(bd_t *bis);
int dc21x4x_initialize(bd_t *bis);
+int dm9000_eth_initialize(int id, u32 *data_addr, u32 *io_addr);
int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
int e1000_initialize(bd_t *bis);
int eepro100_initialize(bd_t *bis);
--
1.6.1.3
_______________________________________________
U-Boot mailing list
[email protected]
http://lists.denx.de/mailman/listinfo/u-boot
