On 04/08/14 18:12, Marek Vasut wrote:
On Monday, August 04, 2014 at 04:41:03 PM, Nikita Kiryanov wrote:
On 03/08/14 17:09, Marek Vasut wrote:
On Sunday, August 03, 2014 at 09:34:42 AM, Nikita Kiryanov wrote:
Add initial support for Compulab CM-FX6 CoM.
Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.

Cc: Igor Grinberg <grinb...@compulab.co.il>
Cc: Stefano Babic <sba...@denx.de>
Cc: Tom Rini <tr...@ti.com>
Signed-off-by: Nikita Kiryanov <nik...@compulab.co.il>
---

   arch/arm/cpu/armv7/mx6/ddr.c       |   1 -
   board/compulab/cm_fx6/Makefile     |  12 ++
   board/compulab/cm_fx6/cm_fx6.c     | 108 ++++++++++
   board/compulab/cm_fx6/common.c     |  83 ++++++++
   board/compulab/cm_fx6/common.h     |  36 ++++
   board/compulab/cm_fx6/imximage.cfg |   8 +
   board/compulab/cm_fx6/spl.c        | 400

+++++++++++++++++++++++++++++++++++++ boards.cfg
|

    2 +

   include/configs/cm_fx6.h           | 227 +++++++++++++++++++++
   9 files changed, 876 insertions(+), 1 deletion(-)
   create mode 100644 board/compulab/cm_fx6/Makefile
   create mode 100644 board/compulab/cm_fx6/cm_fx6.c
   create mode 100644 board/compulab/cm_fx6/common.c
   create mode 100644 board/compulab/cm_fx6/common.h
   create mode 100644 board/compulab/cm_fx6/imximage.cfg
   create mode 100644 board/compulab/cm_fx6/spl.c
   create mode 100644 include/configs/cm_fx6.h

diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index d3891dc..219263a 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -4,7 +4,6 @@

    *
    * SPDX-License-Identifier:     GPL-2.0+
    */

-

   #include <common.h>
   #include <linux/types.h>
   #include <asm/arch/mx6-ddr.h>

Drop this piece ;-)

Yep...

[...]

+++ b/board/compulab/cm_fx6/cm_fx6.c

[...]

+static ulong bank1_size;
+static ulong bank2_size;
+
+#define MMDC1_MDCTL 0x21B0000
+static int probe_mmdc_config(void)
+{
+       u32 val = readl(0x21B0000);
+       switch (val) {
+       case 0x83180000: /* DDR_16BIT_256MB */
+               gd->ram_size = 0x10000000;
+               bank1_size      = 0x10000000;
+               bank2_size      = 0;
+               break;
+       case 0x83190000: /* DDR_32BIT_512MB */
+               gd->ram_size = 0x20000000;
+               bank1_size      = 0x20000000;
+               bank2_size      = 0;
+               break;

imx_ddr_size() won't cut it here ?

It doesn't handle 4GB correctly (returns 0). I suppose
I can make a patch which caps the return value of
imx_ddr_size() for MX6 socs to 3840MB.
What do you think?

That you should check the U-Boot ML, since that's what I did yesterday ;-) But
still, this is rather sad practice -- instead of fixing a bug in code which you
do know about, you implement such a workaround :-(

Actually, I only learned of this bug yesterday after you asked about
imx_ddr_size(). Glad to hear you already fixed it; I'll look at it for
the v2.
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