On 30 October 2014 15:00, Marek Vasut <ma...@denx.de> wrote: > Add example config file entry for the Altera SPI controller. This SPI > controller can also, under special conditions, be used to operate the > EPCS/EPCQ SPI NOR. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Chin Liang See <cl...@altera.com> > Cc: Dinh Nguyen <dingu...@opensource.altera.com> > Cc: Vince Bridgers <vbrid...@altera.com> > Cc: Pavel Machek <pa...@denx.de> > Cc: Stefan Roese <s...@denx.de> > --- > include/configs/socfpga_common.h | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h > index 83a1bcd..1df886b 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -79,6 +79,25 @@ > #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS > > /* > + * EPCS/EPCQx1 Serial Flash Controller > + */ > +#ifdef CONFIG_ALTERA_SPI > +#define CONFIG_CMD_SPI > +#define CONFIG_CMD_SF > +#define CONFIG_SF_DEFAULT_SPEED 30000000 > +#define CONFIG_SPI_FLASH > +#define CONFIG_SPI_FLASH_STMICRO > +#define CONFIG_SPI_FLASH_BAR > +/* > + * The base address is configurable in QSys, each board must specify the > + * base address based on it's particular FPGA configuration. Please note > + * that the address here is incremented by 0x400 from the Base address > + * selected in QSys, since the SPI registers are at offset +0x400. > + * #define CONFIG_SYS_SPI_BASE 0xff240400
So each board-specific config header will define CONFIG_SYS_SPI_BASE is it? for using ALTERA_SPI > + */ > +#endif > + > +/* > * Ethernet on SoC (EMAC) > */ > #if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > -- > 2.0.0 thanks! -- Jagan. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
