Add simple PCI access routines for x86 which permit use before relocation.
The normal PCI stack is still used, but for pre-relocation use there can
only ever be a single hose. After relocation, fall back to the normal
access, although even then on x86 machines there is normally only a single
PCI bus.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/cpu/pci.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++
arch/x86/include/asm/pci.h | 13 ++++++++++++
2 files changed, 63 insertions(+)
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index 4035fa0..9ee663e 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -98,3 +98,53 @@ void pci_init_board(void)
pci_hose_scan(hose);
}
+
+static struct pci_controller *get_hose(void)
+{
+ if (gd->arch.hose)
+ return gd->arch.hose;
+
+ return pci_bus_to_hose(0);
+}
+
+unsigned int pci_read_config8(pci_dev_t dev, unsigned where)
+{
+ uint8_t value;
+
+ pci_hose_read_config_byte(get_hose(), dev, where, &value);
+
+ return value;
+}
+
+unsigned int pci_read_config16(pci_dev_t dev, unsigned where)
+{
+ uint16_t value;
+
+ pci_hose_read_config_word(get_hose(), dev, where, &value);
+
+ return value;
+}
+
+unsigned int pci_read_config32(pci_dev_t dev, unsigned where)
+{
+ uint32_t value;
+
+ pci_hose_read_config_dword(get_hose(), dev, where, &value);
+
+ return value;
+}
+
+void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value)
+{
+ pci_hose_write_config_byte(get_hose(), dev, where, value);
+}
+
+void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value)
+{
+ pci_hose_write_config_word(get_hose(), dev, where, value);
+}
+
+void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value)
+{
+ pci_hose_write_config_dword(get_hose(), dev, where, value);
+}
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 6b16188..fc9a3b8 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -13,4 +13,17 @@
const struct pci_device_id _table[]
void pci_setup_type1(struct pci_controller *hose);
+
+/*
+ * Simple PCI access routines - these work from either the early PCI hose
+ * or the 'real' one, created after U-Boot has memory available
+ */
+unsigned int pci_read_config8(pci_dev_t dev, unsigned where);
+unsigned int pci_read_config16(pci_dev_t dev, unsigned where);
+unsigned int pci_read_config32(pci_dev_t dev, unsigned where);
+
+void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
+void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
+void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
+
#endif
--
2.1.0.rc2.206.gedb03e5
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