On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass <[email protected]> wrote:
> We should invalidate the TLB right at the start to ensure that we don't get
> false address translations even though paging is disabled.
>
> Signed-off-by: Simon Glass <[email protected]>
> ---
>
>  arch/x86/cpu/start16.S | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
> index e718d4b..445d5a1 100644
> --- a/arch/x86/cpu/start16.S
> +++ b/arch/x86/cpu/start16.S
> @@ -24,6 +24,9 @@ start16:
>         /* Set the Cold Boot / Hard Reset flag */
>         movl    $GD_FLG_COLD_BOOT, %ebx
>
> +       xorl    %eax, %eax
> +       movl    %eax, %cr3    /* Invalidate TLB */
> +
>         /* Turn off cache (this might require a 486-class CPU) */
>         movl    %cr0, %eax
>         orl     $(X86_CR0_NW | X86_CR0_CD), %eax
> --

Reviewed-by: Bin Meng <[email protected]>
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