On Thu, Mar 19, 2015 at 10:48 PM, Shaohui Xie <shaohui....@freescale.com>
wrote:
> > >  /* IFC */
> > >  #define CONFIG_SYS_FSL_IFC_LE
> > > +#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
> >
> > It seems tedious to have to define this. Can't you just use the
functions available?
> >
> > [S.H] To use a define is based on a concern that we cannot assume the
I/O access of an IP share same endianness as the Soc(s), we cannot assume
on little endian Soc the I/O access is little endian, on big endian Soc the
I/O access is big endian, the I/O access could be little endian on big
endian Soc and vice versa.
>
> You're saying that the IP is expected to be in different endianness? If
that is practically the case, then I'm fine with this patch. I just want to
ensure that it is not just speculative generality.
>
> [S.H] Yes. The IP is in different endianness, i.e. little endian on LS2,
big endian on PowerPc Soc(s).

OK. It seems that in both of your examples the IP endianness matches the
SoC endianness, which is why I recommended what I did in the first reply.

If you think that this is needed flexibility, then,

Acked-by: Joe Hershberger <joe.hershber...@ni.com>
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