In addition to pins PC00 ~ PC15, PC24, PC25, and PC26 are mapped
to NAND0 DQS, CE2, and CE3 respectively.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
include/configs/sun6i.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index 2c24bd2..e1263f6 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -22,6 +22,8 @@
#define CONFIG_SUNXI_USB_PHYS 3
+#define CONFIG_NAND_SUNXI_GPC_PORTS {24, 25, 26}
+
/*
* Include common sunxi configuration where most the settings are
*/
--
2.1.4
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