On 12/08/2015 11:40, Peng Fan wrote: > The MIB RAM and FIFO receive start register does not exist on > i.MX6UL. Accessing these register will cause enet not work well. > > Signed-off-by: Peng Fan <[email protected]> > Signed-off-by: Fugang Duan <[email protected]> > Cc: Joe Hershberger <[email protected]> > Cc: Stefano Babic <[email protected]> > --- > > Changes v2: > Using runtime check, but not hardcoding "#ifdef". > This patch depends on the runtime checking patch: > https://patchwork.ozlabs.org/patch/505621/. > > drivers/net/fec_mxc.c | 14 +++++++++----- > 1 file changed, 9 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index c5dcbbb..bff5fd1 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -17,6 +17,7 @@ > > #include <asm/arch/clock.h> > #include <asm/arch/imx-regs.h> > +#include <asm/imx-common/sys_proto.h> > #include <asm/io.h> > #include <asm/errno.h> > #include <linux/compiler.h> > @@ -551,12 +552,15 @@ static int fec_init(struct eth_device *dev, bd_t* bd) > writel(0x00000000, &fec->eth->gaddr2); > > > - /* clear MIB RAM */ > - for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) > - writel(0, i); > + /* Do not access reserved register for i.MX6UL */ > + if (!is_cpu_type(MXC_CPU_MX6UL)) { > + /* clear MIB RAM */ > + for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) > + writel(0, i); > > - /* FIFO receive start register */ > - writel(0x520, &fec->eth->r_fstart); > + /* FIFO receive start register */ > + writel(0x520, &fec->eth->r_fstart); > + } > > /* size and address of each buffer */ > writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr); >
Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: [email protected] ===================================================================== _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
