Hi, On 3 August 2016 at 12:29, Fabio Estevam <feste...@gmail.com> wrote: > Hi Tom, > > On Wed, Aug 3, 2016 at 3:09 PM, Tom Rini <tr...@konsulko.com> wrote: > >> I feel like we must have done something wrong of late, can you bisect >> when these came in? Thanks! > > This cache warnings start to appear since commit: > > commit bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc > Author: Simon Glass <s...@chromium.org> > Date: Sun Jun 19 19:43:05 2016 -0600 > > arm: Show cache warnings in U-Boot proper only > > Avoid bloating the SPL image size. > > Signed-off-by: Simon Glass <s...@chromium.org> > > Prior to this commit the cache warnings would be printed only with > DEBUG enabled. Now they are always enabled when we build a non-spl > target. > > We could restore the original behavior and also keep Simon's intention > of not bloating the SPL image size with the following change: > > --- a/arch/arm/lib/cache.c > +++ b/arch/arm/lib/cache.c > @@ -60,10 +60,11 @@ int check_cache_range(unsigned long start, unsigned long > sto > if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1)) > ok = 0; > > - if (!ok) { > - warn_non_spl("CACHE: Misaligned operation at range [%08lx, > %08lx > - start, stop); > - } > +#ifndef CONFIG_SPL_BUILD > + if (!ok) > + debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n", > + start, stop); > +#endif > > return ok; > } > > If this looks OK, I can submit a formal patch.
Actually I think these are bugs and should be fixed. In this case, from what I can tell netboot_common() should cache-align the size in the call to: /* flush cache */ flush_cache(load_addr, size); Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot