Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan <peng....@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Matteo Lisi <matteo.l...@engicam.com>
Cc: Michael Trimarchi <mich...@amarulasolutions.com>
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
 arch/arm/cpu/armv7/mx6/Kconfig  |   2 +
 board/engicam/icorem6/icorem6.c | 142 ++++++++++++++++++++--------------------
 include/configs/imx6qdl_icore.h |   4 ++
 3 files changed, 78 insertions(+), 70 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index e2431a8..762a581 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -100,6 +100,8 @@ config TARGET_MX6Q_ICORE
        select MX6QDL
        select OF_CONTROL
        select DM
+       select DM_GPIO
+       select DM_MMC
        select DM_THERMAL
        select SUPPORT_SPL
 
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 4331ad3..2aa8a4e 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -7,8 +7,6 @@
  */
 
 #include <common.h>
-#include <fsl_esdhc.h>
-#include <mmc.h>
 #include <miiphy.h>
 #include <netdev.h>
 
@@ -29,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
        PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |             \
-       PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |               \
-       PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   |             \
        PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
@@ -55,70 +49,6 @@ static iomux_v3_cfg_t const enet_pads[] = {
        IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
-static iomux_v3_cfg_t const usdhc1_pads[] = {
-       IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
-};
-
-#ifdef CONFIG_FSL_ESDHC
-#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
-
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
-       {USDHC1_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-       struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-       int ret = 0;
-
-       switch (cfg->esdhc_base) {
-       case USDHC1_BASE_ADDR:
-               ret = !gpio_get_value(USDHC1_CD_GPIO);
-               break;
-       }
-
-       return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-       int i, ret;
-
-       /*
-       * According to the board_mmc_init() the following map is done:
-       * (U-boot device node)    (Physical Port)
-       * mmc0                          USDHC1
-       */
-       for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-               switch (i) {
-               case 0:
-                       SETUP_IOMUX_PADS(usdhc1_pads);
-                       gpio_direction_input(USDHC1_CD_GPIO);
-                       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-                       break;
-               default:
-                       printf("Warning - USDHC%d controller not supporting\n",
-                              i + 1);
-                       return 0;
-               }
-
-               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-               if (ret) {
-                       printf("Warning: failed to initialize mmc dev %d\n", i);
-                       return ret;
-               }
-       }
-
-       return 0;
-}
-#endif
-
 #ifdef CONFIG_FEC_MXC
 #define ENET_PHY_RST           IMX_GPIO_NR(7, 12)
 static int setup_fec(void)
@@ -200,6 +130,78 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+/* MMC board initialization is needed till adding DM support in SPL */
+#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
+#include <mmc.h>
+#include <fsl_esdhc.h>
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |             \
+       PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |               \
+       PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+       IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
+};
+
+#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
+
+struct fsl_esdhc_cfg usdhc_cfg[1] = {
+       {USDHC1_BASE_ADDR, 0, 4},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+       struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+       int ret = 0;
+
+       switch (cfg->esdhc_base) {
+       case USDHC1_BASE_ADDR:
+               ret = !gpio_get_value(USDHC1_CD_GPIO);
+               break;
+       }
+
+       return ret;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       int i, ret;
+
+       /*
+       * According to the board_mmc_init() the following map is done:
+       * (U-boot device node)    (Physical Port)
+       * mmc0                          USDHC1
+       */
+       for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+               switch (i) {
+               case 0:
+                       SETUP_IOMUX_PADS(usdhc1_pads);
+                       gpio_direction_input(USDHC1_CD_GPIO);
+                       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+                       break;
+               default:
+                       printf("Warning - USDHC%d controller not supporting\n",
+                              i + 1);
+                       return 0;
+               }
+
+               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+               if (ret) {
+                       printf("Warning: failed to initialize mmc dev %d\n", i);
+                       return ret;
+               }
+       }
+
+       return 0;
+}
+#endif
+
 /*
  * Driving strength:
  *   0x30 == 40 Ohm
diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index b5ad865..0dcf173 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -122,6 +122,10 @@
 #define CONFIG_SPL_MMC_SUPPORT
 #endif
 #include "imx6_spl.h"
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_GPIO
+#undef CONFIG_DM_MMC
+#endif
 #endif
 
 #endif /* __IMX6QLD_ICORE_CONFIG_H */
-- 
2.7.4

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