2016-09-17 3:32 GMT+09:00 Masahiro Yamada <yamada.masah...@socionext.com>:
>  - Add pinctrl driver for sLD3 SoC
>  - Do away with legacy pin-mux code
>  - refactoring of clock/PLL init code
>  - Add PLL init code for LD20 SoC
>  - Improvement of DRAM init code for LD20 SoC
>  - Misc cleanups
> Masahiro Yamada (15):
>   pinctrl: uniphier: support 4bit-width pin-mux register capability
>   pinctrl: uniphier: add UniPhier sLD3 pinctrl driver
>   ARM: dts: uniphier: add pinctrl device node and pinctrl properties
>   ARM: uniphier: select PINCTRL and SPL_PINCTRL
>   ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoC
>   ARM: uniphier: remove ad-hoc pin-mux code for sLD3
>   ARM: uniphier: consolidate NAND pin-mux settings
>   ARM: dts: uniphier: include System Bus pin group node in SPL DT
>   ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20
>   ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20
>   ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PER
>   ARM: uniphier: move PLL init code to U-Boot proper where possible
>   ARM: uniphier: collect clock/PLL init code into a single directory
>   ARM: uniphier: add PLL init code for LD20 SoC
>   ARM: uniphier: update DRAM init code for LD20 SoC

applied to u-boot-uniphier.

Best Regards
Masahiro Yamada
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