From: Konstantin Porotchkin <kos...@marvell.com> Add board init hook to mvebu DW PCIe device driver. Add support for "marvell,reset-gpio" property to A8K board init function. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986 Signed-off-by: Konstantin Porotchkin <kos...@marvell.com> Signed-off-by: Rabeeh Khoury <rab...@solid-run.com> Cc: Stefan Roese <s...@denx.de> Cc: Nadav Haklai <nad...@marvell.com> Cc: Neta Zur Hershkovits <n...@marvell.com> Cc: Omri Itach <om...@marvell.com> Cc: Igal Liberman <ig...@marvell.com> Cc: Haim Boot <ha...@marvell.com> Cc: Hanna Hawa <han...@marvell.com> --- board/Marvell/mvebu_armada-8k/board.c | 22 ++++++++++++ doc/device-tree-bindings/pci/armada8k-pcie.txt | 49 ++++++++++++++++++++++++++ drivers/pci/pcie_dw_mvebu.c | 11 ++++++ 3 files changed, 82 insertions(+) create mode 100644 doc/device-tree-bindings/pci/armada8k-pcie.txt diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c index aa6a6d7..7fca8ed 100644 --- a/board/Marvell/mvebu_armada-8k/board.c +++ b/board/Marvell/mvebu_armada-8k/board.c @@ -152,6 +152,28 @@ int board_xhci_enable(struct udevice *usb_dev) return 0; } +int board_pcie_init(struct udevice *pcie_dev) +{ +#ifdef CONFIG_DM_GPIO + struct gpio_desc reset_gpio; + + gpio_request_by_name(pcie_dev, "marvell,reset-gpio", 0, + &reset_gpio, GPIOD_IS_OUT); + /* + * Issue reset to add-in card trough the dedicated GPIO. + * Some boards are connecting the card reset pin to common + * system reset wire and others are using separate GPIO port. + * In the last case we have to release a reset of the addon + * card using this GPIO. + */ + if (dm_gpio_is_valid(&reset_gpio)) { + dm_gpio_set_value(&reset_gpio, 1); + mdelay(100); + } +#endif /* CONFIG_DM_GPIO */ + return 0; +} + int board_early_init_f(void) { /* Nothing to do (yet), perhaps later some pin-muxing etc */ diff --git a/doc/device-tree-bindings/pci/armada8k-pcie.txt b/doc/device-tree-bindings/pci/armada8k-pcie.txt new file mode 100644 index 0000000..7230f10 --- /dev/null +++ b/doc/device-tree-bindings/pci/armada8k-pcie.txt @@ -0,0 +1,49 @@ +Armada-8K PCIe DT details: +========================== + +Armada-8k uses synopsis designware PCIe controller. + +Required properties: +- compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie". +- reg: base addresses and lengths of the pcie control and global control registers. + "ctrl" registers points to the global control registers, while the "config" space + points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below. +- interrupt-map-mask and interrupt-map, standard PCI properties to + define the mapping of the PCIe interface to interrupt numbers. +- All other definitions as per generic PCI bindings +See Linux kernel documentation: +"Documentation/devicetree/bindings/pci/designware-pcie.txt" + +Optional properties: +PHY support is still not supported for armada-8k, once it will, the following parameters can be used: +- phys : phandle to phy node associated with pcie controller. +- phy-names : must be "pcie-phy" +- marvell,reset-gpio : specifies a gpio that needs to be activated for plug-in + card reset signal release. +Example: + +cpm_pcie0: pcie@f2600000 { + compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; + reg = <0 0xf2600000 0 0x10000>, + <0 0xf6f00000 0 0x80000>; + reg-names = "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + dma-coherent; + + bus-range = <0 0xff>; + ranges = + /* downstream I/O */ + <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 + /* non-prefetchable memory */ + 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + num-lanes = <1>; + clocks = <&cpm_syscon0 1 13>; + marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 17fa024..26451b8 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -112,6 +112,15 @@ struct pcie_dw_mvebu { int first_busno; }; +/* + * Dummy implementation that can be overwritten by a board + * specific function + */ +__weak int board_pcie_init(struct udevice *pcie_dev) +{ + return 0; +} + static int pcie_dw_get_link_speed(const void *regs_base) { return (readl(regs_base + PCIE_LINK_STATUS_REG) & @@ -464,6 +473,8 @@ static int pcie_dw_mvebu_probe(struct udevice *dev) pcie->first_busno = dev->seq; + board_pcie_init(dev); + /* Don't register host if link is down */ if (!pcie_dw_mvebu_pcie_link_up(pcie->ctrl_base, LINK_SPEED_GEN_3)) { printf("PCIE-%d: Link down\n", dev->seq); -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot