On 01/17/2017 03:10 AM, Sumit Garg wrote: >> -----Original Message----- >> From: york sun >> Sent: Tuesday, January 17, 2017 3:29 AM >> To: Sumit Garg <[email protected]>; [email protected] >> Cc: Ruchika Gupta <[email protected]>; Prabhakar Kushwaha >> <[email protected]>; Vini Pillai <[email protected]> >> Subject: Re: [PATCH v3 1/3] SECURE_BOOT: Enable chain of trust on LS1046A >> platform >> >> On 01/05/2017 10:32 PM, Sumit Garg wrote: >>> Define bootscript and its header addresses for QSPI target. Also >>> define PPA header address to enable PPA validation. >>> >>> Signed-off-by: Vinitha Pillai <[email protected]> >>> Signed-off-by: Sumit Garg <[email protected]> >>> --- >>> >>> Changes in v3: >>> Changes in comment style. >>> >>> Changes in v2: >>> Split patches logically from 2 to 3. >>> >>> arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +- >>> arch/arm/include/asm/fsl_secure_boot.h | 20 +++++++++++++++----- >>> 2 files changed, 16 insertions(+), 6 deletions(-) >>> >>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h >>> b/arch/arm/include/asm/arch-fsl-layerscape/config.h >>> index 6073d44..dd5ce9d 100644 >>> --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h >>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h >>> @@ -175,7 +175,7 @@ >>> >>> #define CONFIG_SYS_FSL_IFC_BE >>> #define CONFIG_SYS_FSL_SFP_VER_3_2 >>> -#define CONFIG_SYS_FSL_SNVS_LE >>> +#define CONFIG_SYS_FSL_SEC_MON_BE >>> #define CONFIG_SYS_FSL_SFP_BE >>> #define CONFIG_SYS_FSL_SRK_LE >>> #define CONFIG_KEY_REVOCATION >>> diff --git a/arch/arm/include/asm/fsl_secure_boot.h >>> b/arch/arm/include/asm/fsl_secure_boot.h >>> index 4525287..b270c96 100644 >>> --- a/arch/arm/include/asm/fsl_secure_boot.h >>> +++ b/arch/arm/include/asm/fsl_secure_boot.h >>> @@ -59,9 +59,10 @@ >>> >>> #endif >>> >>> -#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) >>> -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit >>> - * Similiarly for LS2080 >>> +#if defined(CONFIG_FSL_LAYERSCAPE) >>> +/* >>> + * For fsl layerscape based platforms, ESBC image Address in Header >>> + * is 64 bit. >>> */ >>> #define CONFIG_ESBC_ADDR_64BIT >>> #endif >>> @@ -103,12 +104,19 @@ >>> #define CONFIG_BS_ADDR_DEVICE 0x00000840 >>> #define CONFIG_BS_HDR_SIZE 0x00000010 >>> #define CONFIG_BS_SIZE 0x00000008 >>> -#else >>> +#elif defined(CONFIG_QSPI_BOOT) >>> +#ifdef CONFIG_ARCH_LS1046A >>> +#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 >>> +#define CONFIG_BS_ADDR_DEVICE 0x40800000 >>> +#endif >> >> How about #else? If you don't expect #else here, please put an error. >> You may have other than LS1046A in the future. >> >> York > > We do expect LS1012A, LS1088A platforms with QSPI secure boot. Patch [1] is > for LS1012A is in sequence with this patch which provides #elif part for this > #ifdef. > > [1] https://patchwork.ozlabs.org/patch/691306/ >
But still you don't have #else clause. I expect a default setting, or an error or warning when you add a new SoC but forget to add proper setting here. Please keep #else in this patch. York _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
