Simon,
I stumped on this issue when I was rewriting the code to reserve secure
memory. I didn't realize gd->ram_size was used in the driver. I made the
top of memory secure so EL2 code wouldn't be able to access. All of the
sudden my PCI device failed. By reducing the gd->ram_size, PCI works again.
Can you help me to understand a function in drivers/pci/pci-uclass.c?
Around line 818 in function
static int decode_regions(struct pci_controller *hose, const void *blob,
int parent_node, int node)
/* Add a region for our local memory */
size = gd->ram_size;
#ifdef CONFIG_SYS_SDRAM_BASE
base = CONFIG_SYS_SDRAM_BASE;
#endif
if (gd->pci_ram_top && gd->pci_ram_top < base + size)
size = gd->pci_ram_top - base;
pci_set_region(hose->regions + hose->region_count++, base, base,
size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
What would happen if pci_ram_top is not set, and the memory is split
into banks? gd->ram_size would have the total memory, but not in
continuous space. Is adding a single region correct here?
York
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