For the RK3399, which boots in AArch64 mode, the Boot ROM still starts
execution at the instruction following the SPL boot-magic
(i.e. 'RK33'). This puts the first executed instruction on an odd
address (+0x4).
However, we can't reasonably use for the start of the .text-section on
AArch64, as it would violate natural alignment... which in turn
invites trouble down the line if a linker assumes natural alignment or
some assembly snippet tries to be smart.
This series implements both approaches for dealing with this odd
alignment during SPL image creation:
* patches 1 and 2 take an SPL image which starts at (+0x8) and
prepends it with a AArch64 'nop' during image assembly
* patches 3 and 4 change this to using a BOOT0_HOOK to insert a single
4-byte word at the beginning of the SPL build to make space for the
'RK33' magic and then have the mkimage-tool overwrite this word in
the 'set_header' function.
In doing so, the rkimage code is refactored:
- to remove duplication between rksd.c and rkspi.c
- to dynamically allocate the space for headers from vrec
Changes in v2:
- Use BOOT0_HOOK to insert space into the SPL payload that can be
overwritten with the boot magic (e.g. 'RK33') by rkimage
- Change rkimage to overwrite this padding for the RK3399 instead of
inserting an artificial 'nop'
Philipp Tomsich (4):
rockchip: mkimage: simplify start/size calculation for rc4_encode
rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for
RK3399
rockchip: spl: RK3399: use boot0 hook to create space for SPL magic
rockchip: mkimage: update rkimage to support pre-padded payloads
arch/arm/include/asm/arch-rockchip/boot0.h | 18 ++++++
arch/arm/mach-rockchip/Kconfig | 1 +
include/configs/rk3399_common.h | 2 +-
tools/rkcommon.c | 90 ++++++++++++++++++++++++++----
tools/rkcommon.h | 10 ++++
tools/rksd.c | 17 ++----
tools/rkspi.c | 17 ++----
7 files changed, 119 insertions(+), 36 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/boot0.h
--
1.9.1
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