On 10/04/2017 13:44, Peng Fan wrote: > The MIB RAM and FIFO receive start register does not exist on > i.MX6ULL. Accessing these register will cause enet not work well or > cause system report fault. > > Signed-off-by: Peng Fan <[email protected]> > Cc: Joe Hershberger <[email protected]> > --- > drivers/net/fec_mxc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index 910879b..ac7afb5 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd) > writel(0x00000000, &fec->eth->gaddr2); > > /* Do not access reserved register for i.MX6UL */ > - if (!is_mx6ul()) { > + if (!is_mx6ul() && !is_mx6ull()) { > /* clear MIB RAM */ > for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) > writel(0, i); >
Reviewed-by : Stefano Babic <[email protected]> Joe, I see Tom has assigned the series to me. If it is ok for you, I will merge the series into u-boot-imx. Regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: [email protected] ===================================================================== _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
