On Tue, 6 Jun 2017, Kever Yang wrote:
According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll interger mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Acked-by: Simon Glass <s...@chromium.org> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ---
Applied to u-boot-rockchip/master, thanks! _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
