According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode.
Signed-off-by: Kever Yang <[email protected]> Acked-by: Philipp Tomsich <[email protected]> Reviewed-by: Philipp Tomsich <[email protected]> --- Changes in v2: None arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c index a06ef7b..e5393ec 100644 --- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c @@ -334,7 +334,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv) DPLL_MODE_SLOW << DPLL_MODE_SHIFT); /* use integer mode */ - rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT); + rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT); rk_clrsetreg(&pll->con0, PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, -- 1.9.1 _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
