This series addresses a PCIe reliability issue as observed on Apalis T30 related to a PCIe reset timing violation.
This series is available at http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next Changes in v3: - Updated copyright period to 2014-2018. - Added a blank line after declarations as warned by patman. - Added Stephen's acked-by. - Rebased and resend as series so far never got applied! Changes in v2: - Leave resp. enable all port 0 pins input drivers as a customer may optionally want to use some of those MXM3 pins as inputs as well. - Stick to struct tegra_pcie_port as suggested by Stephen. - Introduce proper CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT Kconfig option as suggested by Stephen. - Improved the ifdef vs. if curly braces sequencing as suggested by Stephen. - Keep PCIe port reset status in order to safeguard for future changes to the port reset order or even allow for re-initialisation should that ever be implemented in the higher levels of the driver model. Marcel Ziswiler (3): apalis_t30: describe pcie ports apalis_t30: fix pcie port 0 and 1 pin muxing apalis_t30: fix optional pcie port reset for reliable pcie operation arch/arm/dts/tegra30-apalis.dts | 3 ++ board/toradex/apalis_t30/Kconfig | 9 ++++ board/toradex/apalis_t30/apalis_t30.c | 57 +++++++++++++++++++++- .../toradex/apalis_t30/pinmux-config-apalis_t30.h | 16 +++--- 4 files changed, 77 insertions(+), 8 deletions(-) -- 2.14.3 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot