> -----Original Message----- > From: Laurentiu Tudor [mailto:[email protected]] > Sent: Wednesday, July 4, 2018 7:44 PM > To: York Sun <[email protected]>; Prabhakar Kushwaha > <[email protected]>; [email protected] > Cc: Bharat Bhushan <[email protected]>; Laurentiu Tudor > <[email protected]> > Subject: [PATCH v3 3/7] misc: fsl_portals: setup QMAN_BAR{E} also on ARM > platforms > > QMAN_BAR{E} register setup was disabled on ARM platforms, however the > register does need to be set. Enable the code also on ARMs and fix the > CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the > newly > enabled code works. > > Signed-off-by: Laurentiu Tudor <[email protected]> > --- > arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +-- > drivers/misc/fsl_portals.c | 2 -- > 2 files changed, 1 insertion(+), 4 deletions(-) > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > index 644a16dd30..d22ec70aa5 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > @@ -57,8 +57,7 @@ > #define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80 > #define CONFIG_SYS_QMAN_NUM_PORTALS 10 > #define CONFIG_SYS_QMAN_MEM_BASE 0x500000000 > -#define CONFIG_SYS_QMAN_MEM_PHYS (0xf00000000ull + \ > - > CONFIG_SYS_QMAN_MEM_BASE) > +#define CONFIG_SYS_QMAN_MEM_PHYS > CONFIG_SYS_QMAN_MEM_BASE
Are you sure that these changes works for PowerPC ? Thanks -Bharat > #define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000 > #define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000 > #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000 > diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c > index 7c22b8d209..22faf16751 100644 > --- a/drivers/misc/fsl_portals.c > +++ b/drivers/misc/fsl_portals.c > @@ -24,7 +24,6 @@ void setup_qbman_portals(void) > CONFIG_SYS_BMAN_SWP_ISDR_REG; > void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE + > CONFIG_SYS_QMAN_SWP_ISDR_REG; > -#ifdef CONFIG_PPC > struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; > > /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) > */ > @@ -32,7 +31,6 @@ void setup_qbman_portals(void) > out_be32(&qman->qcsp_bare, > (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32)); > #endif > out_be32(&qman->qcsp_bar, > (u32)CONFIG_SYS_QMAN_MEM_PHYS); > -#endif > #ifdef CONFIG_FSL_CORENET > int i; > > -- > 2.17.1 _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
