On Sun, Aug 26, 2018 at 06:08:23PM +0530, Jagan Teki wrote: > Now clock and reset drivers are available for respective > SoC's so use clk and reset ops on phy driver. > > Tested-by: Jagan Teki <[email protected]> > Signed-off-by: Jagan Teki <[email protected]>
Acked-by: Maxime Ripard <[email protected]> Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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