On 3/5/19 1:19 PM, Marek Vasut wrote:
> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>> The driver will read the cache properties from the device tree file and
>> set it up.
>>

>>  
>> +config L2X0_CACHE
>> +    bool "L2x0 Cache support"
>> +    depends on MISC
>> +    help
>> +      Select this to enable a PL310 L2 Cache driver. The driver will
>> +      configure the L2 Cache settings found in the device tree.
> 
> I wonder whether we don't need some drivers/plat or drivers/soc for this ?

You mean for plat specific implementations?

> 
>>  config ALTERA_SYSID
>>      bool "Altera Sysid support"
>>      depends on MISC
>> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
>> index 6bdf5054f4..ea726f4668 100644
>> --- a/drivers/misc/Makefile
>> +++ b/drivers/misc/Makefile
>> @@ -23,6 +23,7 @@ obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
>>  endif
>>  endif
>>  obj-$(CONFIG_ALI152X) += ali512x.o
>> +obj-$(CONFIG_L2X0_CACHE) += cache-l2x0.o
>>  obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
>>  obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
>>  obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
>> diff --git a/drivers/misc/cache-l2x0.c b/drivers/misc/cache-l2x0.c
>> new file mode 100644
>> index 0000000000..b31598b1cd
>> --- /dev/null
>> +++ b/drivers/misc/cache-l2x0.c
>> @@ -0,0 +1,84 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2007 ARM Limited
> 
> 2007 ? :)

I think I can remove this. I started with the Linux's cache-l2x0, but
removed almost all of the code. Just a left-over artifact.


>> +
>> +    saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |
>> +                 L310_LATENCY_CTRL_WR(tag[1] - 1) |
>> +                 L310_LATENCY_CTRL_SETUP(tag[2] - 1);
>> +
>> +    writel(saved_reg, &regs->pl310_tag_latency_ctrl);
>> +
>> +    saved_reg = readl(&regs->pl310_data_latency_ctrl);
>> +    dev_read_u32_array(dev, "arm,data-latency", tag, 3);
> 
> What happens if the array isn't present ?
> Should we _not_ configure the latencies in such case ?

Right, I have a to-do list that need to handle error conditions like this.

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