> -----Original Message----- > From: Andreas Schwab <sch...@suse.de> > Sent: Wednesday, March 6, 2019 4:27 PM > To: Anup Patel <anup.pa...@wdc.com> > Cc: Auer, Lukas <lukas.a...@aisec.fraunhofer.de>; u-boot@lists.denx.de; > paul.walms...@sifive.com; ag...@suse.de; a...@brainfault.org; > bar...@tkos.co.il; daniel.schwierz...@gmail.com; bmeng...@gmail.com; > r...@andestech.com; s...@denx.de; pal...@sifive.com; Atish Patra > <atish.pa...@wdc.com> > Subject: Re: [PATCH v2 0/9] SMP support for RISC-V > > Apparently sometimes u-boot tries to boot the kernel on heart 0 (the E51 > core), which will then fail to start userspace, since that cannot cope with > the > missing fpu.
That's not possible because in this series we have "available_hart_mask" to track HARTs that entered U-Boot. Recently, Atish made some progress with OpenSBI warm-boot issues. I will let him provide details about it. Regards, Anup _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
