> -----Original Message----- > From: Palmer Dabbelt <pal...@sifive.com> > Sent: Monday, March 11, 2019 5:26 PM > To: Anup Patel <anup.pa...@wdc.com> > Cc: sch...@suse.de; Atish Patra <atish.pa...@wdc.com>; > a...@brainfault.org; lukas.a...@aisec.fraunhofer.de; Paul Walmsley > <paul.walms...@sifive.com>; ag...@suse.de; u-boot@lists.denx.de; > bar...@tkos.co.il; daniel.schwierz...@gmail.com; bmeng...@gmail.com; > r...@andestech.com; s...@denx.de > Subject: RE: [PATCH v2 0/9] SMP support for RISC-V > > On Thu, 07 Mar 2019 19:37:30 PST (-0800), Anup Patel wrote: > > > > > >> -----Original Message----- > >> From: Andreas Schwab <sch...@suse.de> > >> Sent: Thursday, March 7, 2019 2:50 PM > >> To: Anup Patel <anup.pa...@wdc.com> > >> Cc: Atish Patra <atish.pa...@wdc.com>; Anup Patel > >> <a...@brainfault.org>; Auer, Lukas <lukas.a...@aisec.fraunhofer.de>; > >> paul.walms...@sifive.com; ag...@suse.de; u-boot@lists.denx.de; > >> bar...@tkos.co.il; daniel.schwierz...@gmail.com; > bmeng...@gmail.com; > >> r...@andestech.com; s...@denx.de; pal...@sifive.com > >> Subject: Re: [PATCH v2 0/9] SMP support for RISC-V > >> > >> On Mär 07 2019, Anup Patel <anup.pa...@wdc.com> wrote: > >> > >> > Like I mentioned, there is no functional issue with this series. > >> > The warm-boot issues were fixed in OpenSBI. > >> > > >> > @Andreas, please try at your end. > >> > >> As long as issue#65 isn't fixed opensbi is mostly a no-go for me. At > >> least it gives me more reasons to press the reset button. :-) > > > > The reset button works fine for me an Atish. I am sure it works fine > > for lot of other folks too. > > > > BTW, as-per discussion with SiFive folks the reset button on Unleashed > > Board is not much tested and it can misbehave on certain boards. It is > > quite possible that you might have a "flaky" board. > > I don't think the reset button differs between boards. As far as I know, the > issues are really just that it doesn't reset everything -- specifically some > of > the IP on the chip (clock, power, JTAG) isn't reset and nothing on the board > (SD, ethernet, PCIe, etc) is reset. This frequently results in flakiness when > debugging drivers, but the cores and memory system should all be OK. > > Is that issue 65 on github.com/opensbi? If so it clearly says this isn't a > reset > button issue.
The issue#65 on githuh.com/opensbi is not a clearly defined and it went in various directions. We tried various things suggested by Andreas and we were only able to replicate issue with reset-button press. This fixed now and reset-button press works perfectly fine with OpenSBI. Apart from reset-button thingy, we tried all other things reported by Andreas but we were not able to reproduce issue at our end. Regards, Anup _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
