Hi Christophe, > > From: Patrick Delaunay <[email protected]> > > ETHCK_K is the identifier the kernel clock for ETH in kernel binding, > selected by > ETHKSELR / gated by ETHCKEN = BIT(7). > U-Boot driver need to use the same identifier, so change ETHCK to ETHCK_K. > > Signed-off-by: Patrick Delaunay <[email protected]> > Signed-off-by: Christophe Roullier <[email protected]> > --- > > drivers/clk/clk_stm32mp1.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index > aebc6f0..d70e039 100644 > --- a/drivers/clk/clk_stm32mp1.c > +++ b/drivers/clk/clk_stm32mp1.c > @@ -553,7 +553,7 @@ static const struct stm32mp1_clk_gate > stm32mp1_clk_gate[] = { > > STM32MP1_CLK_SET_CLR(RCC_MP_AHB5ENSETR, 0, GPIOZ, > _UNKNOWN_SEL), > > - STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 7, ETHCK, > _ETH_SEL), > + STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 7, ETHCK_K, > _ETH_SEL), > STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 8, ETHTX, > _UNKNOWN_SEL), > STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 9, ETHRX, > _UNKNOWN_SEL), > STM32MP1_CLK_SET_CLR_F(RCC_MP_AHB6ENSETR, 10, ETHMAC, > _ACLK), > -- > 2.7.4
For stm32mp1 boards EV1 and DK2 Test done with master (SHA1 = 75ce8c938d39bd22460be66e6bf318bd2410c17b) Tested-by: Patrick Delaunay <[email protected]> Regards Patrick _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
