> To support unaligned output buffers (i.e. 'in' in the terminology of > the SPI framework), this change splits each 16bit FIFO element after > reading and writes them to memory in two 8bit transactions. With this > change, we can now always use the optimised mode for receive-only > transcations independent on the alignment of the target buffer. > > Given that we'll run with caches on, the impact should be negligible: > as expected, this has no adverse impact on throughput if running with > a 960MHz LPLL configuration. > > Signed-off-by: Philipp Tomsich <[email protected]> > --- > > drivers/spi/rk_spi.c | 19 ++++++------------- > 1 file changed, 6 insertions(+), 13 deletions(-) >
Applied to u-boot-rockchip, thanks! _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
