From: Siva Durga Prasad Paladugu <[email protected]> This patch removes check for Versal platform in gem driver as it now supports clock setting through clock framework.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]> --- This patch depends on https://lists.denx.de/pipermail/u-boot/2019-September/383239.html Joe: I would take this together with versal clock driver when reviewed. --- drivers/net/zynq_gem.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index a35ecab79ee9..a7a6ce987f07 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -463,7 +463,6 @@ static int zynq_gem_init(struct udevice *dev) break; } -#if !defined(CONFIG_ARCH_VERSAL) ret = clk_set_rate(&priv->clk, clk_rate); if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) { dev_err(dev, "failed to set tx clock rate\n"); @@ -475,9 +474,6 @@ static int zynq_gem_init(struct udevice *dev) dev_err(dev, "failed to enable tx clock\n"); return ret; } -#else - debug("requested clk_rate %ld\n", clk_rate); -#endif setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); -- 2.17.1 _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
