Remove the hard-coded delay configuration. The AR8035 config() always
enabled the TX delay mode, although it will be set according to the PHY
interface mode, too.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_TXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Michael Walle <mich...@walle.cc>
---
drivers/net/phy/atheros.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 402998c8d5..629c6b192a 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -118,9 +118,6 @@ static int ar8035_config(struct phy_device *phydev)
regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
- ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5,
- 0, AR803x_RGMII_TX_CLK_DLY);
-
ret = ar803x_delay_config(phydev);
if (ret < 0)
return ret;
--
2.20.1
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