Hi Rick, On Wed, Oct 30, 2019 at 8:42 AM Rick Chen <[email protected]> wrote: > > Hi Bin > > > > > Hi Rick, > > > > On Fri, Oct 25, 2019 at 2:17 PM Andes <[email protected]> wrote: > > > > > > From: Rick Chen <[email protected]> > > > > > > The U-Boot SPL will boot in M mode and load the > > > FIT image which include OpenSbi and U-Boot proper > > > > nits: OpenSBI > > OK > > > > > > images. After loading progress, it will jump to > > > OpenSbi first and then U-Boot proper which will > > > > ditto > > OK > > > > > > run in S mode. > > > > > > Signed-off-by: Rick Chen <[email protected]> > > > Cc: KC Lin <[email protected]> > > > Cc: Alan Kao <[email protected]> > > > --- > > > arch/riscv/cpu/ax25/Kconfig | 4 +++- > > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > > > diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig > > > index d411a79..8d8d71d 100644 > > > --- a/arch/riscv/cpu/ax25/Kconfig > > > +++ b/arch/riscv/cpu/ax25/Kconfig > > > @@ -6,7 +6,9 @@ config RISCV_NDS > > > imply RISCV_TIMER > > > imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE) > > > imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE) > > > - imply V5L2_CACHE > > > > Why this is removed? > > Without CACHE_SUPPORT, the compiling will fail while enable V5l2_CACHE. > That is why I remove it. I hope it can be enable manually. > Because it will enlarge U-Boot SPL size. >
Could you please describe it in the commit message? Regards, Bin _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
