pá 17. 1. 2020 v 8:31 odesílatel Michal Simek <[email protected]> napsal: > > From: Rajan Vaja <[email protected]> > > The clock driver makes EEMI call to get the name of invalid clk > when executing versal_get_clock_info() function. This results in > error messages. > Added check for validating clock before saving clock attribute and > calling versal_pm_clock_get_name() in versal_get_clock_info() function. > > Signed-off-by: Rajan Vaja <[email protected]> > Signed-off-by: Michal Simek <[email protected]> > --- > > drivers/clk/clk_versal.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c > index 7e97b0c4bf3a..6ca46c612df8 100644 > --- a/drivers/clk/clk_versal.c > +++ b/drivers/clk/clk_versal.c > @@ -569,6 +569,12 @@ static void versal_get_clock_info(void) > continue; > > clock[i].valid = attr & CLK_VALID_MASK; > + > + /* skip query for Invalid clock */ > + ret = versal_is_valid_clock(i); > + if (ret != CLK_VALID_MASK) > + continue; > + > clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ? > CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT; > nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK; > -- > 2.25.0 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
